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some functionality is only available in PCMCIA mode.
Pin functionality is programmed according to the follow-
ing table:
PCMCIA
ANTSEN
Pin Value
TIR26[3]
0
X
1
0
1
X
1
X
1
1
Pin 142: TXCMD/LA21
The TXCMD/LA21 pin may be configured to operate as
input or output and may be configured to drive a trans-
ceiver control reference signal using one of two timing
sources plus input from the TXCMD bit of TIR11
(TIR11[0]). Note that some functionality is only available
in PCMCIA mode.
Pin functionality is programmed according to the
following table.
PCMCIA
RCEN
Pin Value
TIR11[3]
0
X
1
0
1
1
1
1
1
1
Pin 143: TXDATA/LA20
The TXDATA/LA20 pin may be configured to operate as
input or output and may be configured to drive inverted
transmit data. Note that some functionality is only
available in PCMCIA mode. Pin functionality is pro-
grammed according to the following table:
PCMCIA
TXDLFN
Pin Value
TCR30[6]
0
X
1
0
1
1
1
1
Pin 144: LLOCKE/SA15
The LLOCKE/SA15 pin may be configured to operate as
input or output. Note that some functionality is only avail-
able in PCMCIA mode. Pin functionality is programmed
according to the following table:
P R E L I M I N A R Y
ANSLTLFN
ANTSLTLEN
TCR30[7]
TCR15[7]
X
X
0
X
1
0
1
1
0
X
TXCMFN
TXCMEN
TCR30[5]
TCR15[5]
X
X
X
X
0
X
1
0
1
1
TXDATA/
TXDLEN
LA20 Pin
TCR15[6]
Direction
X
I
X
O
0
I
1
O
Am79C930
Note that a read of the ANTSLTD bit (TCR7[1]) will al-
ways give the current ANTSLT/LA23 pin value without
inversion, regardless of pin configuration setting.
ANTSLT/
ANTSLT/
LA23 Pin
LA23 Pin
Direction
Value
I
NA
ANTSLT
O
I
NA
O
TCR7[1]
TIR26[4] (write)
O
TIR26[5] (read)
Transmit state machine generated signals T1, T2, T3,
TXP _ ON and O_TX have the timing indicated in the
diagram in section Am79C930-Based TX Power
Ramp Control.
Note that a read of the TXCMDT bit (TCR7[2]) will al-
ways give the current TXCMD/LA21 pin value without
inversion, regardless of pin configuration setting.
TXCMD/
TXCMD/
LA21 Pin
LA21 Pin
Direction
Value
I
NA
O
O_TX
O
TIR11[0] + T1
I
NA
O
TCR7[2]
The TXDATA signal is the inverse of the TXDATA signal
which is the TX data drawn from the TX FIFO using the
internal TX state machine control.
Note that a read of the TXDATALD bit (TCR7[0]) will al-
ways give the current TXDATA/LA20 pin value without
inversion, regardless of pin configuration setting.
TXDATA/
LA20 Pin
Value
NA
(LA20 input function)
TXDATA
(from internal TX FIFO
using internal TX state machine timing)
NA
TCR7[0]
Note that a read of the LLOCKE bit (TIR11[4]) will al-
ways give the current LLOCKE/SA15 pin value without
inversion, regardless of pin configuration setting.
AMD
(LA23 input function)
(from internal antenna)
(diversity circuit)
(LA21 input function)
41
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