Monitor Display At Tripping - Toshiba VF-PS1 Instruction Manual

8.4.2 Monitor display at tripping

At the occurrence of a trip, the same information as that displayed in the mode described in 8.2.1, "Status monitor
under normal conditions," can be displayed, as shown in the table below, if the inverter is not turned off or reset.
To display trip information after turning off or resetting the inverter, follow the steps described in 8.2.2, "Display of
detailed information a past trip."
Example of call-up of trip information
Commun
ication
No.
FC90
-
FE00
[Note 3]
FE01
*1
-
[Note 4]
-
*2
[Note 4]
[Note 5]
-
*3
[Note 4]
-
*4
8
FE06
[Note 6]
FE07
FE08
FE73
FE10
[Note 7]
FE11
[Note 7]
FE12
[Note 7]
FE13
[Note 7]
(Continued overleaf)
Key
Item displayed
operated
Trip information
MODE
Setting monitor mode
MODE
Output frequency
Direction of rotation
Frequency command
value
Output current
Input voltage (DC
detection)
Output voltage
Input terminal
information 1
Input terminal
information 2
Input terminal
information 3
Output terminal
information 1
Output terminal
information 2
CPU1 version
CPU2 version
Past trip 1
Past trip 2
Past trip 3
Past trip 4
LED
display
Status monitor mode (The code blinks if a trip occurs.)

The motor coasts and comes to a stop (coast stop).
The first basic parameter "History function ()" is

displayed.
The operation frequency when the trip occurred is

displayed.
The direction of rotation when the trip occurred is

displayed.(:Forward run, :Reverse run)
The operation command value when the trip occurred

is displayed.
The inverter output current at tripping (load current) is

displayed.
The inverter DC voltage at the occurrence of a trip is

displayed.
The inverter output voltage at the occurrence of a trip

is displayed.
The ON/OFF status of each of the control input
        terminals at tripping (F, R, RES, S1, S2, S3, RR/S4) is
displayed in bits.
The ON/OFF status of each of the optional control
input terminals at tripping (LI1, LI2, LI3, LI4) is
   
displayed in bits.
The ON/OFF status of each of the optional control
    input terminals at tripping (LI5, LI6, LI7, LI8) is
displayed in bits.
The ON/OFF status of each of the control output
terminals at tripping (OUT1, OUT2 and FL) is
  
displayed in bits.
The ON/OFF status of each of the optional control
        output terminals (OUT3, OUT4, R1, OUT5, OUT6, R2,
R3, R4) is displayed in bits.
The version of the CPU1 is displayed.

 The version of the CPU2 is displayed.
 ⇔ 
Past trip 1 (displayed alternately at 0.5-sec. intervals)
 ⇔  Past trip 2 (displayed alternately at 0.5-sec. intervals)
 ⇔  Past trip 3 (displayed alternately at 0.5-sec. intervals)
 ⇔  Past trip 4 (displayed alternately at 0.5-sec. intervals)
H-10
E6581386
Description