Sharp LC-52XS1E Service Manual page 67

Pin No. Pin Name
B7, A8, F7, E8 UDQS, UDQS
LDQS, LDQS
A2, E2, L1, R3, NC
R7, R8
A9, C1, C3, C7, VDDQ
C9, E9, G1, G3,
G7, G9
A7, B2, B8, D2, VSSQ
D8, E7, F2, F8,
H2, H8
J1 VDDL
J7 VSSDL
A1, E1, J9, M9, VDD
R1
A3, E3, J3, N1, VSS
P9
J2 VREF
9. IC6351 (RH-iXC012WJQZQ)
This is an IC for IrSS encoding, which receives the signals from the IrSS light receiving section located on the RC/LED PWB, encode them and
transfer the data to IC6201 via the SLOW BUS.
Ir communication controller
Pin No. Pin Name
J8 CI
J9 CO
H7,J7 CLKSEL[1:0]
A9 XRESET
H6, J6, D[15:0]
H5, J5,
H4, J4, J3,
J2, J1, H1,
G1, F1,
E2, E1,
D2, D1
C1, B1, A[5:0]
A1, A2,
A3, B3
A5 XCS
A6 XRD
A7 XWR
A4 BYTE
A8 INT
B5 DREQ
B4 XDACK
E9 IRTXA
D9 IRRXA
G9 IRTXB
F9 IRRXB
F8 IRRX2
C9 IRRC
I/O
I/O Data Strobe : Output with read data, input with write data.
Edge-aligned with read data, centered in write data.
For the x16, LDQS corresponds to the data on DQ0~DQ7 ; UDQS corresponds to
the data on DQ8~DQ15
The data strobes DQS, LDQS and UDQS may be used in single ended mode or paired with optional
complementary signals DQS, LDQS and UDQS to provide differential pair signaling to the system dur-
ing both reads and writes. An EMRS(1) control bit enables or disables all complementary data strobe
signals.
- No Connect : No internal electrical connection is present.
DQ Power Supply : +1.8V ±0.1V.
-
- DQ Ground.
DLL Power Supply : +1.8V ± 0.1V.
-
- DLL Ground.
Power Supply : +1.8V ±0.1V.
-
- Ground.
I Reference voltage for inputs for SSTL interface.
I/O
I Oscillation buffer input
O Oscillation buffer output
I Clock selection
00-16MHz 01-24MHz 10-32MHz 11-48MHz
I Reset signal
I/O System Data Bus
I System Address Bus
I System Chip Select
I System Read signal
I System Wright signal
I System 8bit access
BYTE
0
0
1
1
O System Interrupt request signal
O System DMA Transmission demand signal
I System DMA Transmission bitter taste knowledge signal
O Front end Channel A transmission signal
I Front end Channel A received signal
O Front end Channel B transmission signal
I Front end Channel B received signal
I Front end Channel received signal
O Front end Ir remote control signal
Pin Function
Pin Function
A[0] D[15:8] D[7:0]
0 Effective Effective
1 Effective Invalid
0 Invalid Effective
1 Effective Invalid
5 – 8
LC-52XS1E/RU/LC-65XS1E/RU
Remarks
Duty 40-60%
Negative logic
Negative logic
Negative logic
Negative logic
Positive logic
Logic is a register setup.
Logic is a register setup.
Negative logic
Positive logic
Logic is a register setup.
Positive logic
Logic is a register setup.
Logic is a register setup.
Positive logic