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LC-52XS1E/RU/LC-65XS1E/RU
Pin No.
93
96
97
4. IC6052 (VHiTLVD1023-1Q)
This is an LVDS Tx, which converts the 8-bit RGBs of LVTTL sent from IC6102 into LVDS signals.
LVDS Transmitter.
Pin No.
Pin Name
70, 71
TA1+, TA1-
68, 69
TB1+, TB1-
64, 65
TC1+, TC1-
58, 59
TD1+, TD1-
56, 57
TE1+, TE1-
62, 63
TCLK1+, TCLK1-
52, 53
TA2+, TA2-
50, 51
TB2+, TB2-
46, 47
TC2+, TC2-
40, 41
TD2+, TD2-
38, 39
TE2+, TE2-
44, 45
TCLK2+, TCLK2-
87 - 84,
R19 ~R10
81 - 76
99 - 95,
G19 ~G10
92 - 88
112 -110,
B19 ~B10
108 -106,
103 - 100
124 - 115
R29 ~R20
136 - 127
G29 ~G20
6, 5, 2, 1,
B29 ~B20
144 - 139
17, 18
CONT11,CONT12
19, 20
CONT21,CONT22
9
DE
8
VSYNC
7
HSYNC
15
CLKIN
21
R/F
22
RS
24
MAP
Pin Name
I/O
DGND
---
Audio clock regeneration PLL analog ground.
XTALVCC
---
Audio clock regeneration PLL crystal oscillator power. 3.3V
REGVCC
---
Audio clock regeneration PLL crystal regulator power. 3.3V
I/O
The 1st Link.
The 1st pixel output data when Dual-Link.
O
O
LVDS Clock Out for 1st and 2nd Link.
The 2nd Link.
These pins are disabled when Single Link.
O
O
Additional LVDS Clock Out. Identical to TCLK1+,-. No connect if not used.
The 1st Pixel Data Inputs.
I
The 2nd Pixel Data Inputs.
I
CONTROL Data Inputs.
I
I
Data Enable Input.
I
Vsync Input.
I
Hsync Input.
I
Clock Input.
Input Clock Triggering Edge Select.
I
H: Rising edge, L: Falling edge
The use of these multi-function depends on input voltage of RS pin.
Input voltage
of RS pin
VCC
I
0.6~1.4V
GND
I
LVDS mapping table select.
H: Mapping Mode1
L: Mapping Mode2
5 – 5
Pin Function
Pin Function
R1 [9 : 0]
G1 [9 :0]
B1 [9 :0]
R2 [9 : 0]
G2 [9 : 0]
B2 [9 : 0]
TTL/CMOS Input
LVDS output
VIH/VIL Control for
Swing Control
Small Swing Input
VIH/VIL is fixed
Normal Swing
Support Small Swing Input
VOD=350mV(typ)
VIH/VIL depends on
input voltage of RS pin
See VIH/VIL Spec
Reduced Swing
VIH/VIL is fixed
VOD=200mV(typ)
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Troubleshooting
