IBM TotalStorageFAStT900 User Manual page 101

Fibre channel storage server
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Groups are discovered by the SANavigator tool and
displayed with a gray background on the Physical and
Data Path Maps.
loop port (FL_Port). An N-Port or F-Port that supports
arbitrated loop functions associated with an arbitrated
loop topology.
LUN. See logical unit number.
MAC.. See medium access control.
medium access control (MAC).. In LANs, the
sublayer of the data link control layer that supports
medium-dependent functions and uses the services of
the physical layer to provide services to the logical link
control sublayer. The MAC sublayer includes the
method of determining when a device has access to the
transmission medium.
man pages. In UNIX-based operating systems, online
documentation for operating-system commands,
subroutines, system calls, file formats, special files,
stand-alone utilities, and miscellaneous facilities.
Invoked by the man command.
management information base (MIB). The
information that is on an agent. It is an abstraction of
configuration and status information.
MCA. See micro channel architecture.
MIB. See management information base.
micro channel architecture (MCA). IBM's proprietary
bus that is used in high-end PS/2 personal computers.
Micro Channel is designed for multiprocessing and
functions as either a 16-bit or 32-bit bus. It eliminates
potential conflicts that arise when installing new
peripheral devices.
MIDI. See musical instrument digital interface.
model. The model identification assigned to a device
by its manufacturer.
musical instrument digital interface (MIDI). A
protocol that allows a synthesizer to send signals to
another synthesizer or to a computer, or a computer to
a musical instrument, or a computer to another
computer.
NDIS. See network device interface specification.
network device interface specification (NDIS). An
application programming interface (API) definition that
allows DOS or OS/2 systems to support one or more
network adapters and protocol stacks. NDIS is a 16-bit,
Ring O (for the OS/2 operating system) API that defines
a specific way for writing drivers for layers 1 and 2 of
the OSI model. NDIS also handles the configuration and
binding of these network drivers to multiple protocol
stacks.
network management station (NMS). In the Simple
Network Management Protocol (SNMP), a station that
executes management application programs that
monitor and control network elements.
NMI. See non-maskable interrupt.
NMS. See network management station.
non-maskable interrupt (NMI). A hardware interrupt
that another service request cannot overrule (mask). An
NMI bypasses and takes priority over interrupt requests
generated by software, the keyboard, and other such
devices and is issued to the microprocessor only in
disastrous circumstances, such as severe memory
errors or impending power failures.
N_Port. A node port. A Fibre Channel defined
hardware entity that performs data communications over
the Fibre Channel link. It is identifiable by a unique
Worldwide Name. It can act as an originator or a
responder.
node. A physical device that allows for the
transmission of data within a network.
nonvolatile storage (NVS). A storage device whose
contents are not lost when power is cut off.
NVS. See nonvolatile storage.
NVSRAM. Nonvolatile storage random access
memory. See nonvolatile storage.
Object Data Manager (ODM). An AIX proprietary
storage mechanism for ASCII stanza files that are
edited as part of configuring a drive into the kernel.
ODM. See Object Data Manager.
out-of-band. Transmission of management protocols
outside of the Fibre Channel network, typically over
Ethernet.
PCI local bus. See peripheral component interconnect
local bus.
PDF. See portable document format.
peripheral component interconnect local bus (PCI
local bus). A standard that Intel Corporation
introduced for connecting peripherals. The PCI local bus
allows up to 10 PCI-compliant expansion cards to be
installed in a computer at a time. Technically, PCI is not
a bus but a bridge or mezzanine. It runs at 20 - 33 MHz
and carries 32 bits at a time over a 124-pin connector
or 64 bits over a 188-pin connector. A PCI controller
card must be installed in one of the PCI-compliant slots.
The PCI local bus is processor independent and
includes buffers to decouple the CPU from relatively
slow peripherals, allowing them to operate
asynchronously. It also allows for multiplexing, a
technique that permits more than one electrical signal to
be present on the PCI local bus at a time.
75
Glossary

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