BIOS Setup Utility
DRAM Clock / Driver Control
Setting
Current
DRAM
Frequency
DRAM Clock By SPD
133 MHz
166 MHz
200 MHz
By SPD
DRAM
Timing
Manual
DRAM CAS
1.5
Latency
2
2.5
3
Bank
Disabled
Interleave
2 Bank
4 Bank
Precharge to
2T
Active (Trp)
3T
4T
5T
Active to
6T
Precharge
7T
(Tras)
8T
9T
Active to
2T
CMD (Trcd)
3T
4T
5T
SY-KT600 DRAGON Plus
Description
Show the current bus speed of
DRAM.
This item allows you to control the
DRAM speed.
If enable the DRAM will auto detect
the DRAM timing.
When synchronous DRAM is
installed, the number of clock cycles
of CAS latency depends on the
DRAM timing. Do not reset this
field from the default value specified
by the system designer.
Increase DRAM performance.
Increase DRAM performance.
Increase DRAM performance.
Increase DRAM performance.
58
Note
Default
Default
Default
Default
Default
Default
Default