Foxconn 400M01 Series Manual page 47

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Chapter 3
BIOS Description
DRAM Clock/Drive Control Menu
Current FSB Frequency
This option is used to show current FSB frequency.
Current DRAM Frequency
This option is used to show current DRAM frequency.
DRAM Clock (Default: By SPD)
This option is used to set DRAM clock.
DRAM Timing (Default: Auto By SPD)
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to "Auto By SPD" enables DRAM tim-
ings to be determined by BIOS based on the configurations on the SPD.
Selecting "Manual" allows users to configure the DRAM timings manually.
The setting values are:Manual, Auto By SPD, Turbo, Ultra.
DRAM CAS Latency (Default: Depend on Memory)
When synchronous DRAM is installed, the number of clock cycles of CAS
latency depends on the DRAM timing.
Bank Interleave (Default: Depend on Memory)
This field selects 2-bank or 4-bank interleave for the installed SDRAM. Dis-
able the function if 16MB SDRAM is installed.
Precharge to Active (Trp) (Default: Depend on Memory)
This option controls the number of cycles for Row Address Strobe (RAS) to
be allowed to precharge. If insufficient time is allowed for the RAS to
accumulate its charge before DRAM refresh, refresh may be incomplete
and DRAM may fail to retain data. This option applies only when synchro-
nous DRAM is installed in the system.
47
400M01 Series User Manual
47
2004-3-18, 13:49
400M01-FOXCONN-V1.0-BIOS-en-030304.p65

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