Ide Support - SOYO SY-TISU User Manual

Motherboard Description
interface to AGP are allowed. No transactions from AGP to the hub
interface are allowed.
1-6.6 Hub Interface
The hub interface is a private interconnect between the Intel®
815EP B-step MCH and the ICH2.

1-6.7 IDE Support

The motherboard has two independent bus-mastering PCI IDE interfaces.
These interfaces support PIO Mode3, PIO Mode 4, PIO Mode 5 ATAPI
devices (e.g., CD-ROM), and Ultra DMA 33/66/100 synchronous-DMA
mode transfers. The BIOS supports logical block addressing (LBA) and
extended cylinder head sector (ECHS) translation modes. The BIOS
automatically detects the IDE device transfer rate and translation mode.
Programmed I/O operations usually require a substantial amount of
processor bandwidth. However, in multitasking operating systems, the
bandwidth freed by bus mastering IDE can be devoted to other tasks while
disk transfers are occurring.
The motherboard also supports laser servo (LS-120) drives. LS-120
technology allows the user to perform read/write operations to LS-120
(120MB) and conventional 1.44MB and 720KB diskettes. An optical servo
system is used to precisely position a dual-gap head to access the diskett's
2,490 tracks per inch (tpi) containing up to 120 MB of data storage. A
conventional diskette uses 135 tpi for 1.44 MB of data storage.
LS-120 drivers are ATAPI-compatible and connect to the motherboard's
IDE interface. (LS-120 drives are also available with SCSI and parallel
port interfaces.) Some versions of Windows 95 and Windows NT
operating systems recognize the LS-120 drive as a bootable device in both
120 MB and 1.44 MB mode.
Connection of an LS-120 drive and a standard 3.5-inch diskette drive is
allowed. The LS-120 drive can be configured as a boot device if selected
as Drive A in the BIOS setup program.
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SY-TISU