HP 8566B Adjustment Manual page 293

If PLL2 is phaselocked, proceed to step 12. If PLL2 will not phaselock
(PL2 UNLOCK indicated on CRT), start with step 1.
1. Set the RF Section LINE switch to STANDBY. Remove AlOA6
Motherboard Assembly. It is
the AlOA6 PLL2 0 Detector Assembly from the RF Section.
2. Set the RF Section LINE switch to ON and press @ZZQ
3. Disconnect the cable 7 (violet) from AlOA5J4 SCAN I.1 MHz
OUT, and connect the frequency counter BNC input to AlOA5J4
using a BNC to SMB Snap-on Test Cable. Set
switch on the frequency counter to (lo
impedance switch to 150.
4. On the RF Section, key in
(SHIFT) (MKR+
8.600 MHz,
5. Connect the DVM to AlOA8TP5 VCO TUNE. Refer to Figure 3-79
for the location of AlOA8TP5 VCO TUNE.
17. 20/30 Loop Phase Lock Adjustments
not necessary to completely remove
the
HZ MHZ
10 MHz,
SWEEP [j!ZZZj, TRACE A
REF
input selector
),
and set the
)
FREQ
Adjustments 3-153