External Interrupt Control Register, Low Byte (Exticonl); External Interrupt Pending Register (Extipnd) - Samsung S3C8275X User Manual

I/O PORTS
Figure 9-11. External Interrupt Control Register, Low Byte (EXTICONL)
9-10

External Interrupt Control Register, Low Byte (EXTICONL)

F9H, Set 1, Bank 0, R/W
MSB .7 .6 .5
P1.3/INT3 P0.2/INT2
EXTICONL bit configuration settings:
00
Disable interrupt
01
Enable interrupt by falling edge
10
Enable interrupt by rising edge
11
Enable interrupt by both falling and rising edge

External Interrupt Pending Register (EXTIPND)

F7H, Set 1, Bank 0, R/W
MSB .7 .6 .5
P1.7 P1.6 P1.5
(INT7) (INT6) (INT5)
EXTIPND bit configuration settings:
0
No interrupt pending (when read), clear pending bit (when write)
1
Interrupt is pending (when read)
Figure 9-12. External Interrupt Pending Register (EXTIPND)
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
.4 .3 .2
P0.1/INT1 P0.0/INT0
.4 .3 .2 .1
P1.4 P1.3 P0.2 P0.1
(INT4) (INT3) (INT2) (INT1)
.1 .0 LSB
.0 LSB
P0.0
(INT0)