Pwc Reload Buffer Register (Rlbr) - Fujitsu Semiconductor Controller MB89950/950A Hardware Manual

F2mc-8l 8-bit microcontroller
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CHAPTER 8 PULSE WIDTH COUNT TIMER (PWC)
8.3.3

PWC Reload Buffer Register (RLBR)

The PWC reload buffer register (RLBR) functions as a reload register for the interval
timer function and as a measurement value storage register for the pulse width
measurement function.
I PWC reload buffer register (RLBR)
Figure 8.3-5 "PWC reload buffer register (RLBR)" shows the bit structure of the PWC reload buffer
register.
Address
Bit 7
0016
H
R/W
R
R/W: Readable and writable
R : Read-only
X : Indeterminate
G
For interval timer function
The register functions as a reload register, specifying the interval time.
The counter starts to count down from the set value written in this register when counter operation is
enabled (PCR1: EN = "1").
In reload timer mode, the RLBR register value is reloaded to the counter and the counter continues
counting down when a counter value underflows (01
during counter operation, the new value applies from the next time the counter is reloaded due to an
underflow (01
Reference:
The setting value of the RLBR register for the interval timer function is calculated as follows:
RLBR register value = interval time/(count clock cycle x instruction cycle)
152
Figure 8.3-5 PWC reload buffer register (RLBR)
Bit 6
Bit 5
Bit 4
Bit 3
R/W
R/W
R/W
R/W
R
R
R
R
--> 00
).
H
H
Bit 2
Bit 1
Bit 0
Initial value
XXXXXXXX
R/W
R/W
R/W
......For the interval timer function
R
R
R
......For the pulse width measurement function
--> 00
). If a value is written to the RLBR register
H
H
B

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