Dma Channels - Intel D810E2CA3 Specification

Table 14. I/O Map (continued)
Address (hex)
64 contiguous bytes starting on a 64-byte divisible boundary
256 contiguous bytes starting on a 256-byte divisible
boundary
64 contiguous bytes starting on a 64-byte divisible boundary
256 contiguous bytes starting on a 256-byte divisible
boundary
64 contiguous bytes starting on a 64-byte divisible boundary
32 contiguous bytes starting on a 32-byte divisible boundary
32 contiguous bytes starting on a 32-byte divisible boundary
16 contiguous bytes starting on a 16-byte divisible boundary
4096 contiguous bytes starting on a 4096-byte divisible
boundary
64 contiguous bytes starting on a 64-byte divisible boundary
Notes:
1. Default, but can be changed to another address range.
2. Dword access only
3. Byte access only
NOTE
Some additional I/O addresses are not available due to ICH2 address aliassing.
For information about
ICH2 addressing

2.4 DMA Channels

Table 15.

DMA Channels

DMA Channel Number
0
1
2
3
4
5
6
7
Size
Data Width
8 or 16 bits
8 or 16 bits
8 or 16 bits
8 or 16 bits
16 bits
16 bits
16 bits
Description
D810E2CA3 Board resource
AC '97 audio mixer
ICH2 LAN controller
AC '97 modem mixer
AC '97 audio mixer
ICH2 (USB controller #1)
ICH2 (USB controller #2)
ICH2 (SMB)
Intel 82801BA PCI bridge
Intel 82562ET LAN controller (optional)
Refer to
Section 1.2, page 16
System Resource
Open
Parallel port
Diskette drive
Parallel port (for ECP or EPP)
DMA controller
Open
Open
Open
Technical Reference
45