Host Interface - Epson L-1000 Technical Manual

REV.-A
PRINCIPLES OF OPERATION

2.2.9 Host Interface

The host interface circuit is shown in Figure 2-57. STROBE pulses from the host computer pass through the
low-pass filter, consisting of R32 and C21, and flow into the STRB terminal. These pulses latch the parallel
data and set the BUSY signal HIGH, so that subsequent data transfer is inhibited. The gate array PINT terminal
is automatically output by the STRB signal to request a CPU interrupt. When the CPU receives this interrupt
request, it reads the data latched in the gate array. Table 2-20 shows the commands associated with the gate
array E01A05KA (6C) host interface.
Figure 2-57. Host Interface
2-62
LQ-500/ L-1000