Ipmb Communication Interface; Lan Interface - Intel X38ML - Server Board Motherboard Technical Manual

Intel® Server Board X38ML
5.19.6.5 SMM Interface
The SMM interface is a KCS interface used by the BIOS when interface response time is a
concern, such as with the BIOS SMI handler. The BMC gives this interface priority over other
communication interfaces. The BMC can handle a limited number of back-to-back transactions
before it loses responsiveness. It must be able to handle up to 30 back-to-back commands from
the BIOS.
The BMC implements the optional Get Status/Abort transaction on this interface. Only LUN 1 is
supported on this interface. In addition, the status register OEM1/2 bits are defined as specified
in Section 5.19.6.3.
The event message buffer is shared across SMS and SMM interfaces.
The host I/O address of the SMM interface is nominally 0CA4h – 0CA5h, but this address
assignment may be overwritten by the platform-specific section of the appendix.
5.19.7

IPMB Communication Interface

The IPMB communication protocol uses the 100 KB/s version of an I
medium. For more information on I
IPMB implementation in the BMC is compliant with the IPMB v1.0, revision 1.0.
The BMC IPMB slave address is 20h.
The BMC sends and receives IPMB messages over the IPMB interface. Non-IPMB messages
received by the IPMB interface are discarded.
Messages sent by the BMC are either originated by the BMC (for example, when an agent
operation is initialized), or on behalf of another source (for example, when a Send Message
command is issued by SMS with an IPMB channel number).
For IPMB request messages originated by the BMC, the BMC implements a response timeout
interval of 60 ms and a retry count of 3.
5.19.8

LAN Interface

The BMC implements both the IPMI 1.5 and IPMI 2.0 messaging models. These provide out-of-
band local area network (LAN) communication between the BMC and the external world.
The BMC supports a maximum of one LAN interface, the Intel
two LAN interfaces for operating system use but only the 82575 PI NIC supports the handling of
server management traffic.
See the IPMI 2.0 Specification for details about the IPMI-over-LAN protocol.
Run-time determination of LAN channel capabilities can be determined both by standard IPMI-
defined mechanisms and by an OEM configuration parameter that defines advanced feature
support.
Revision 1.3
2
C specifications, see The I
Intel order number E15331-006
Platform Management
2
C bus as its physical
2 C Bus and How to Use It. The
®
Server Board X38ML supports
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