DDR Data Swizzling
9
DDR Data Swizzling
To achieve better memory performance and better memory timing, Intel design
performed the DDR Data pin swizzeling that will allow a better use of the product
across different platforms. Swizzeling has no effect on functional operation and is
invisible to the OS/SW.
However, during debug, swizzeling needs to be taken into consideration. This chapter
presents swizzeling data. When placing a DIMM logic analyzer, the design engineer
must pay attention to the swizzeling table to perform an efficient memory debug.
Datasheet, Volume 1
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