Processor Graphics Vid Based (Vaxg) Supply Dc Voltage And Current Specifications; Ddr3 Signal Group Dc Specifications - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 1 01-2011 Datasheet

Electrical Specifications
Table 7-7. Processor Graphics VID based (V
Specifications
Symbol
V GFX_VID
AXG
Range
LL
AXG
V TOB
AXG
V Ripple
AXG
I
AXG
I
AXG_TDC
Notes:
1. V
CCAXG
2. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical
data. These specifications will be updated with characterized data from silicon measurements at a later
date.
3. The V
AXG_MIN
4. The loadlines specify voltage limits at the die measured at the VAXG_SENSE and VSSAXG_SENSE lands.
Voltage regulation feedback for voltage regulator circuits must also be taken from processor VAXG_SENSE
and VSSAXG_SENSE lands.
5. PSx refers to the voltage regulator power state as set by the SVID protocol.
6. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing
such that two processors at the same frequency may have different settings within the VID range. Note
that this differs from the VID employed by the processor during a power management event (Adaptive
Thermal Monitor, Enhanced Intel SpeedStep Technology, or Low Power States).
Table 7-8. DDR3 Signal Group DC Specifications (Sheet 1 of 2)
Symbol Parameter
V Input Low Voltage
IL
V Input High Voltage
IH
Output Low Voltage
V
OL
Output High Voltage
V
OH
DDR3 data buffer pull-up
R
ON_UP(DQ)
resistance
DDR3 data buffer pull-down
R
ON_DN(DQ)
resistance
DDR3 on-die termination
R equivalent resistance for data
ODT(DQ)
signals
DDR3 on-die termination DC
V working point (driver set to
ODT(DC)
receive mode)
DDR3 clock buffer pull-up
R
ON_UP(CK)
resistance
DDR3 clock buffer pull-down
R
ON_DN(CK)
resistance
Datasheet, Volume 1
Parameter
GFX_VID Range for V
V Loadline Slope
CCAXG
V Tolerance Band
CC
PS0, PS1
PS2
Ripple:
PS0
PS1
PS2
Current for Processor Graphics
core
Sustained current for Processor
Graphics core
is VID based rail.
and V loadlines represent static and transient limits.
AXG_MAX
Min
—
SM_VREF + 0.1
—
—
24.31
22.88
83
41.5
0.43*V
20.8
20.8
) Supply DC Voltage and Current
AXG
Min Typ
CCAXG
0.2500 —
4.1
19
11.5
±10
±10
-10/+15
— —
— —
Typ
—
—
(V / 2)* (R
DDQ ON
/(R +R ))
ON TERM
V – ((V / 2)*
DDQ DDQ
(R /(R +R ))
ON ON TERM
28.6
28.6
100
50
0.5*V
DDQ DDQ
26
26
Max Unit Note
1.5200 V 1
m 3, 4
mV 3, 4, 5
mV 3, 4, 5
35 A
25 A
Max Units Notes
SM_VREF – 0.1 V
— V
—
— V
31.8 
34.32 
117

65
0.55*V V
DDQ
28.6 Ω
31.2 Ω
2
1,9
2,4
3
6
4,6
5
5
7
7
5
5
81