Sharp ER-A450T Service Manual page 25

The voltage at the (–) pin of the comparator IC7A is always main-
tained to 5.1V by means of the zener diode ZD2, while +24V supply
voltage is divided through the resistors R114, R115 and R116, and is
applied to the (+) pin. When normal +24V is in supply, 6.8V is sup-
plied to the (+) pin, therefore, signal POFF is at a high level. When
+24V supply voltage decreases due to a power off or any other
reason, the voltage at the (+) pin also decreases. When +24V supply
voltage drops, the voltage at the (+) pin drops below +5.1V, which
causes POFF to go low, thus predicting the power-off situation.
VDD
14
9
RESETS
8
CKDC8
10
IC12C
74HC00S
R245
C188 C86
10K
1000P
1000P
STOP
The STOP signal from the CPU is converted into the RESETS signal
by the CKDC8.
The RESETS signal from the CKDC8 is converted into the RESET
signal at the gate backed-up by the VRAM power, performing the
system reset.
5. Memory control
1) Memory map
All range memory map
000000H
Internal I/O
External I/O
Memory image area
1C0000H
C00000H
Expansion I/O area (1M byte)
FFFFFFH
Fig. 5-1
( 1) "Internal I/O" means the registers in the H8/510.
( 2) "External I/O" means the base system I/O area to be ad-
dressed in page 0.
( 3) "Memory image area" means the lower 32KB of ROM area
which is projected to 000000H ~ 007FFFH for allowing reset
start and other vector addressing, or the lower 32KB of ROM
area which is projected to 008000H ~ 00FE7FH for allowing 0
page addressing of work RAM area.
( 4) "Expansion I/O" means expansion I/O device area which is
addressed to area other than page 0.
VDD
14
4
RAS3
6
/(RAS3./RESET)
5
VDD
IC12B
74HC00S
14
1
3
/RESET
2
IC12A
74HC00S
C175
1000P
(*1)
(*2)
(*3)
RAM area
(10M byte)
ROM area
(3M byte)
0 page memory map
000000H
ROM image area
004000H 32KB
008000H
RAM image area
slightly smaller than32KB
00FFFFH
NOT USE
1BFFFFH
RAM area
1FFFFFH
ROM image area: Image is formed in ROM area address
C00000H to C07FFFH. This area is identical to IPL ROM area
which will beseparately developed.
RAM image area: Image is formed in RAM area address 1F0000H
to 1F7E7FH. ( Note)
Note: Image can be formed in lower 32KB of RAS2.
ROM area memory map
C00000H
C80000H
CA0000H
D00000H
EFFFFFH
4 – 17
00F800H
RAM image area
00FE80H
Internal I/O area
00FF80H
External I/O area
(0 page)
00FFFFH
Fig. 5-2
ROS1
(512K Byte)
ROS2
(Not used)
ROS3
NOT USE
Fig. 5-3