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POWER VCORE1
VCORE_1
PR226
*20mil_04
U46
3.3VS
3.3VS
*74AHC1G08GW
DELAY_PWR GD_R
1
PR165
10K_04
4
DELAY _PWRGD
VR_RDY A
2
PR150
10K_04
[6]
VCC_GT_SENSE
[6]
VSS_GT_SENSE
VTT_CPU
PR154
PR163
54.9_1%_04
130_1%_04
H_CPU_SVIDD AT
[5]
H_CPU_SVIDDAT
[5]
H_CPU_SVIDALRT#
H_CPU_SVIDALRT#
APGND
[5]
H_CPU_SVIDCLK
H_CPU_SVIDC LK
APGND
H_PROCHOT#
VIN
[3]
H_PROCHOT#
D 04
[5]
VCORE_VSS_SENSE
PR157
*20mil_04
[5]
VCORE_VCC_SENSE
PR158
*20mil_04
PR151
PC110
10_1%_04
680p_50V_X7R_04
TRBST#
PR152
1.21K_1%_04
PR 179
PC146
TR BSTA#
*1K_1%_04
*680p_50V_X7R_04
PR182
PR32
FBA
*1. 21K_1%_04
*24.9KK_1%_04
PR35
PC22
*4700p_50V_X7R_04
*1K_1%_04
*3300p_50V_X7R_04
PR34
CSCOMP
APGND
2.43K_1%_04
PC150
0.1u_10V_X5R_04
APGND
PR178
24.3k_1%_04
APGND
PR191
PR 31
PC141
PC144
10p_50V_NPO_04
165K_1%_04
10_1%_04
33p_50V_NPO_04
PR36
PC143
D 04
D04
12/27
PR30
1K_1%_04
12/27
D 04
[15]
4.3K_1%_04
2200p_50V_X7R_04
12/27
PR199
66.5K_1%_06
5VS
APGND
D04
PR171
*20mil_04
PC158
PC134
1000p_50V_X7R_04
1000p_50V_X7R_04
PR167
*20mil_04
CSREF A
PC169
0.1u_10V_X5R_04
PR28
*15mil_06
APGND
PU1
5VS
PR160
2_06
1
45
PC 131
2.2u_6.3V_X5R_06
APGND
2
VCC
PWMA
44
VDDBP
BSTA
VR_RD Y A
3
43
VRDY A
HGA
VR_EN
4
42
NCP6132A
5
EN
SWA
41
PJ18 *40mil
H_CPU _SVIDDAT
SDIO
LGA
1
2
H_CPU _SVIDALRT#
6
40
ALERT#
BST2
H_CPU _SVIDCLK
7
39
8
SCLK
HG2
38
PR164
10K_04
VBOOT
VBOOT
SW2
PR155
90.9K_1%_04
9
37
R OSC
LG2
10
36
PR156
1K_04
11
VRMP
PVCC
35
H_PROCHOT#
VRHOT#
PGND
DELAY _PWRGD_R
12
34
13
VRDY
LG1
33
VSN
SW1
PC129
14
32
VSP
HG1
15
31
0.01u_50V_X7R_04
D IFF
BST1
APGND
PR200 47K_1%_04
VSN
PC130
1000p_50V_X7R_04
VSP
PC164
0.1u_10V_X5R_04
PC139
CSP1
PR168
1K_1%_04
CSP2
CSP3
33p_50V_NPO_04
PR161
PC140
PR162
PC126
CSR EF
49.9_1%_04
100p_50V_NPO_04
CSREF
[37]
4.12K_1%_06
4700p_50V_X7R_04
D 04
12/27
PC154
PR153
10.7K_1%_04
1000p_50V_X7R_04
CSSUM
APGND
PC113
PR173
PC145
4700p_50V_X7R_04
PC151
1200p_50V_X7R_04
APGND
PC152
390p_50V_X7R_04
PR177
PR181
APGND
APGND
PC148
PR33
PC142
75K_1%_04
165K_1%_04
RT1
2
1
PUT COLSE
*20mil_04
1000p_50V_X7R_04
TO VCORE
PR 174
DROOP
CSREF
100K_1%_NTC_06
Phase 1
*3.6K_1%_04
Inductor
PR43
PC24
PR42
RT4
PUT COLSE
*1K_1%_04
*100p_50V_NPO_04
*20mil_04
1000p_50V_X7R_04
TO GT
CSCOMPA
DROOPA
Inductor
PR39
1.6K_1%_04
PR 49
TSENSEA
SW N1A
[37]
CSREFA
CSR EFA
[37]
PC160
0.047u_10V_X7R_04
APGND
CSP1A
PR50
3.6K_1%_04
SWN1A
[37]
PUT COLSE
TO VGFX
HOT SPOT
PR196
35.7K_1%_06
5VS
PR197
2_06
PC 166
0.22u_10V_X5R_04
HG1A
[37]
SW1A
[37]
LG1A
[37]
PR198
2_06
PC 167
0.22u_10V_X5R_04
PR192
HG2
[37]
*0_04
SW2
[37]
LG2
[37]
PC 165
2.2u_6.3V_X5R_04
CSP1A
LG1
[37]
5VS
CSP2A
SW1
[37]
HG1
[37]
PR194
2_06
PC168
0.22u_10V_X5R_04
CSP1
PR187
SWN1
[37]
6.98K_1%_04
PR235
PC161
*1K_1%_04
0.047u_10V_X7R_04
CSREF
CSP2
PR185
SWN2
[37]
6.98K_1%_04
APGND
PR236
PC159
*1K_1%_04
0.047u_10V_X7R_04
CSREF
[11,15,27]
ALL_SY S_PWRGD
PR 188
137K_1%_06
SW N1
[37]
PR 184
137K_1%_06
SW N2
[37]
[11,30,31,32, 33,34,35,37,38]
VIN
[3,9,10,11,12,13,14,15,16,17, 18,19,20,23,24,25, 27,28,29,30,31]
3.3VS
[12,13,19, 20,25,29,30,31]
5VS
[2,3,5,6, 18,19,20,34,35]
VTT_CPU
Schematic Diagrams
PC27
CSREFA
*4.7K_1%_04
TSENSE
R T3
RT2
PR190
PR186
Sheet 36 of 42
PUT COLSE
TO VCORE
POWER VCORE1
HOT SPOT
Option for
Option for
1 phase
2 phase
GT
5VS
CPU
PR52
PR183
*20mil_04
*20mil_04
CSP3
3.3VS
PR 139
10K_04
PJ17
* 40mil
PR143
VR _EN
*15m il_06
POWER VCORE1 B - 37
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