Hps Boot Flash Interface; C Eeprom - Intel Arria 10 User Manual

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5. Board Components
683227 | 2023.07.12

5.10.3. HPS Boot Flash Interface

Table 54.
Bank
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
5.10.4. I
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The HPS includes dedicated I/O. The dedicated I/O [17:4] are used to connect the
following boot flash daughtercards:
NAND Flash (x8) card: 128MB
QSPI Flash card: 128MB
SD Micro flash card: 4GB
Dedicated I/O Pin Assignments
Pin Number
Schematic Signal Name
E16
HPS_DIO0
H16
HPS_DIO1
K16
HPS_DIO2
G16
HPS_DIO3
H17
HPS_DIO4
F15
HPS_DIO5
L17
HPS_DIO6
N19
HPS_DIO7
M19
HPS_DIO8
E15
HPS_DIO9
J16
HPS_DIO10
L18
HPS_DIO11
M17
HPS_DIO12
K17
HPS_DIO13
The flash mode is selected by the
values are 0x02, 0x04 and 0x06.
BOOTSEL
2

C EEPROM

This board includes a 32 Kb EEPROM device. This device has a 2-wire I
interface bus and is organized as four blocks of 4K x 8-bit memory. The main function
of the device is for EtherCAT IP usage, but it can be used for other storage purposes
as well.
NF1.0 Interface
QSPI Interface
NAND_ADQ0
QSPI_CLK
NAND_ADQ1
QSPI_IO0
NAND_WEn
QSPI_SS0
NAND_REn
QSPI_IO1
NAND_ADQ2
QSPI_IO2_WPn
NAND_ADQ3
QSPI_IO3_HOLD
NAND_CLE
Not used
NAND_ALE
Not used
NAND_RB
Not used
NAND_CEn
Not used
NAND_ADQ4
Not used
NAND_ADQ5
Not used
NAND_ADQ6
Not used
NAND_ADQ7
Not used
bits defined in the flash daughtercard.
BOOTSEL
®
®
Intel
Arria
10 SoC Development Kit User Guide
SDMMC Interface
SDMMC_DATA0
SDMMC_CMD
SDMMC_CCLK
SDMMC_DATA1
SDMMC_DATA2
SDMMC_DATA3
SDMMC_PWR
Not used
SDMMC_DATA4
SDMMC_DATA5
SDMMC_DATA6
SDMMC_DATA7
Not used
Not used
2
C serial
115

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