Intel Core 2 Duo User Manual page 10

Processor with the mobile intel 945 gme express chipset
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I n fr a r e d D a t a Assoc. The I nfrared Dat a Associat ion ( I rDA) has out lined a specificat ion
I M VP6
I n t e r - Sym bol I n t e r fe r e n ce
M e dia Ex pa nsion Ca r d
N e t w or k
Ove r shoot
Pa d
Pin
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TM
I nt el
Core
2 Duo processor wit h t he Mobile I nt el
Manual
10
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I n t e l
needed t o ensure t he set up t im e of t he receiver. More precisely,
flight t im e is defined as:
• The t im e difference bet ween a signal at t he input pin of a
receiving agent crossing t he swit ching volt age ( adj ust ed t o
m eet t he receiver m anufact urer 's condit ions required for
AC t im ing specificat ions; i.e., ringback, et c.) and t he out put
pin of t he driving agent crossing t he swit ching volt age
when t he driver is driving a t est load used t o specify t he
driver 's AC t im ings.
• Maxim um and Minim um Flight Tim e - Flight t im e variat ions
are caused by m any different param et ers. The m ore
obvious causes include variat ion of t he board dielect ric
const ant , changes in load condit ion, crosst alk, power noise,
variat ion in t erm inat ion resist ance, and differences in I / O
buffer perform ance as a funct ion of t em perat ure, volt age,
and m anufact uring process. Som e less obvious causes
include effect s of Sim ult aneous Swit ching Out put ( SSO)
and packaging effect s.
• Maxim um flight t im e is t he largest accept able flight t im e a
net work will experience under all condit ions.
• Minim um flight t im e is t he sm allest accept able flight t im e a
net work will experience under all condit ions.
for serial com m unicat ion bet ween t wo devices via a bi-
direct ional infrared dat a port . The 945GME plat form has such a
port and it is locat ed on t he rear of t he plat form bet ween t he t wo
USB connect ors.
The I nt el Mobile Volt age Posit ioning specificat ion for t he I nt el
Core™ 2 Duo Processor. I t is a DC- DC convert er m odule t hat
supplies t he required volt age and current t o a single processor.
I nt er- sym bol int erference is t he effect of a previous signal ( or
t ransit ion) on t he int erconnect delay. For exam ple, when a
signal is t ransm it t ed down a line and t he reflect ions due t o t he
t ransit ion have not com plet ely dissipat ed, t he following dat a
t ransit ion launched ont o t he bus is affect ed. I SI is dependent
upon frequency, t im e delay of t he line, and t he reflect ion
coefficient at t he driver and receiver. I SI m ay im pact bot h t im ing
and signal int egrit y.
The Media Expansion Card ( MEC) provides digit al display opt ions
t hrough t he SDVO int erface. The MEC card also incorporat es
video- in.
The net work is t he t race of a Print ed Circuit Board ( PCB) t hat
com plet es an elect rical connect ion bet ween t wo or m ore
com ponent s.
The m axim um volt age observed for a signal at t he device pad,
m easured wit h respect t o VCC.
The elect rical cont act point of a sem iconduct or die t o t he
package subst rat e. A pad is only observable in sim ulat ions.
The cont act point of a com ponent package t o t he t races on a
subst rat e, such as t he m ot herboard. Signal qualit y and t im ings
m ay be m easured at t he pin.
®
945GME Express Chipset
9 4 5 GM E Ex pr e ss Ch ipse t —Abou t Th is M a n u a l
Order Num ber: 317443- 001US
®
May 2007

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