Supermicro X6DVL-EG2 User Manual page 78

X6DVL-EG2 User's Manual
B-2 Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
Checkpoint
E0h
E1h
E2h
E6h
Edh
Eeh
Efh
F0h
F1h
F2h
F3h
F4h
F5h
FBh
FCh
FDh
FFh
B-3 Uncompressed Initialization Codes
The following runtime checkpoint codes are listed in order of execution.
These codes are uncompressed in F0000h shadow RAM.
Checkpoint
03h
05h
06h
07h
08h
0Ah
0Bh
Code Description
The onboard floppy controller if available is initialized. Next,
beginning the base 512 KB memory test.
Initializing the interrupt vector table next.
Initializing the DMA and Interrupt controllers next.
Enabling the floppy drive controller and Timer IRQs. Enabling internal
cache memory.
Initializing the floppy drive.
Looking for a floppy diskette in drive A:. Reading the first sector of
the diskette.
A read error occurred while reading the floppy drive in drive A:.
Next, searching for the AMIBOOT.ROM file in the root directory.
The AMIBOOT.ROM file is not in the root directory.
Next, reading and analyzing the floppy diskette FAT to find the
clusters occupied by the AMIBOOT.ROM file.
Next, reading the AMIBOOT.ROM file, cluster by cluster.
The AMIBOOT.ROM file is not the correct size.
Next, disabling internal cache memory.
Next, detecting the type of flash ROM.
Next, erasing the flash ROM.
Next, programming the flash ROM.
Flash ROM programming was successful. Next, restarting the
system BIOS.
Code Description
The NMI is disabled. Next, checking for a soft reset or a power on
condition.
The BIOS stack has been built. Next, disabling cache memory.
Uncompressing the POST code next.
Next, initializing the CPU and the CPU data area.
The CMOS checksum calculation is done next.
The CMOS checksum calculation is done. Initializing the CMOS status
register for date and time next.
The CMOS status register is initialized. Next, performing any required
B-2