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XDV-P9
Pin No.
Pin Name
80-84
SD6-2
85
VSS
86,87
SD1,0
88
XERR
89
XSACK
90
XTEST
91
SREQ
92-95
HADRS10-7
96
VSS
97
VDD
98-102
HADRS6-2
103-106
HDATA15-12
107
VSS
108-113
HDATA11-6
114
VDD
115-118
HDATA5-2
119
VSS
120,121
HDATA1,0
122
BUSSEL
123
XOSDACK
124
XOSDREQ
125,126
HCPUSEL1,0
127-129
XINT3-1
130
VSS
131
VDD
132
XINT0
133
XEXTRDY
134
HRW
135
HCLKIN
136
XHCS
137
XHAS
138-141
XHBE3-0
142
VSS
143
MDRADR4
144
MDRADR3
145
MDRADR5
146
MDRADR2
147
VDD
148
VSS
149
MDRADR6
150
MDRADR1
151
MDRADR7
152
MDRADR0
153
MDRADR8
154
VSS
155-158
TEST6-9
159
MDRADR10
160
MDRADR9
161
MDRADR11
162
XMDRCS
163
MDRCKE
164
VSS
165
VDD
166
XMDRRAS
167
MDRCLK
168
VSS
169
MDRCLKIN
170
XMDRCAS
102
I/O
Function and Operation
I
Parallel data input
GND
I
Parallel data input
I
Error input signal
I
Acknowledge signal
I
Test terminal
O
Data request signal
I
CPU address bus signal
GND
2.5V Power supply
I
CPU address bus signal
I/O
CPU data bus signal
GND
I/O
CPU data bus signal
2.5V Power supply
I/O
CPU data bus signal
GND
I/O
CPU data bus signal
I
Bus width select signal
I
OSD data acknowledge signal
O
OSD data request signal
I
CPU select signal
O
Interruption request signal to CPU
GND
2.5V Power supply
O
Interruption request signal to CPU
O
Acknowledge signal to CPU
I
CPU read/write signal
I
Host clock input
I
LSI chip select signal
I
CPU address status
I
CPU byte enable signal
GND
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Address signal for SDRAM
2.5V Power supply
GND
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Address signal for SDRAM
GND
I
Test terminal
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Address signal for SDRAM
O
Chip select signal for SDRAM
O
Clock enable signal for SDRAM
GND
2.5V Power supply
O
RAS signal for SDRAM
O
Clock output signal for SDRAM
GND
I
Clock input signal for SDRAM
O
CAS signal for SDRAM
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