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ADDR=0x122: Receive Pointer Interpreter Mask
Bit 7
Bit 6
Bit name Reserved
Reserved
R/W
—
—
Value
0
0
after
reset
Bits 7-2: Reserved
Bit 1:
RX_LOP_D_MASK: RX_LOP delta bit mask
Bit 0:
RX_PAIS_D_MASK: RX_PAIS delta bit mask
These bits are used to enable/disable status reporting of the corresponding event bits. If set, the reporting
status of the corresponding bit in the event register is disabled.
ADDR=0x126: Receive Pointer Interpreter Delta
Bit 7
Bit 6
Bit name Reserved
Reserved
R/W
—
—
Value
0
0
after
reset
Bits 7-2: Reserved
Bit 1:
RX_LOP_D: RX_LOP delta bit
Bit 0:
RX_PAIS_D: RX_PAIS delta bit
These bits are set if a change in state of the corresponding event bit occurs. They are cleared by writing a
one to them.
70
Bit 5
Bit 4
Reserved
Reserved
—
—
0
0
Bit 5
Bit 4
Reserved
Reserved
—
—
0
0
Bit 3
Bit 2
Reserved
Reserved
—
—
0
0
Bit 3
Bit 2
Reserved
Reserved
—
—
0
0
Bit 1
Bit 0
RX_LOP_D
RX_PAIS_
_MASK
D_MASK
R/W
R/W
1
1
Bit 1
Bit 0
RX_LOP_D
RX_PAIS_
D
W1C
W1C
0
0
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