Contec F&eIT Series User Manual page 24

Interrupt Status
This is a port on which the interrupt status generated by the Module can be verified.
Although in this example values are assigned centered on the status concerning
interrupt levels, information on interrupt sources varies from module to module.
Starting I/O
address
input
+2
(02h)
Figure 4.5.
- Enable [D7]:
This verifies the interrupt source enabled/disabled status.
The value "1" indicates that a hardware interrupt on the controller module is
enabled.
- Status [D6]:
This bit indicates an interrupt request status in the module.
When IRQ5, IRQ7, or IRQ9 is "1", this bit will also be "1".
- IRQ* [D2 - D0]:
These bits allow you to verify the interrupt level that is currently set. The current
interrupt level is indicated as "1".
Following are examples of the initialization that is performed in high-level languages:
Microsoft C
IrqStatus = inp( ADR+2 );
Setting an Interrupt Level
Starting I/O
address
output
+2
(02h)
Figure 4.6.
- Enable [D7]:
This bit enables an interrupt source.
- IRQ* [D2 - D0]:
The interrupt level used by the module is set in these bits.
Following are examples of initialization settings that can be affected in high-level
languages.
The interrupt level to be used is assigned to IRQ5.
Microsoft C
outp( ADR+2, 0x81 );
CNT24-2(FIT)GY
D 7 D 6 D 5
Enable Status 0
Interrupt Status
D 7 D 6 D 5
Enable N/A N/A
Setting an Interrupt Level
Using the I/O Address Map
D 4 D 3 D 2
Interrupt Status
0 0 IRQ9
Microsoft QBASIC
IrqStatus = INP( ADR+2 )
D 4 D 3 D 2
Interrupt Data
IRQ9
N/A N/A
Data
Microsoft QBASIC
OUT ADR+2, &H81
D 1 D 0
IRQ7 IRQ5
D 1 D 0
IRQ7 IRQ5
Data Data
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