Texas Instruments TRF7970A Manual page 9

www.ti.com
TERMINAL
NAME NO.
IRQ 13
MOD 14
V 15
SS_A
V 16
DD_I/O
I/O_0 17
I/O_1 18
I/O_2 19
I/O_3 20
I/O_4 21
I/O_5 22
I/O_6 23
I/O_7 24
EN2 25
DATA_CLK 26
SYS_CLK 27
EN 28
V 29
SS_D
OSC_OUT 30
OSC_IN 31
V 32
DD_X
Thermal Pad PAD
Copyright © 2011–2017, Texas Instruments Incorporated
Table 4-1. Terminal Functions (continued)
(1)
TYPE
OUT Interrupt request
INP External data modulation input for direct mode 0 or 1
OUT Subcarrier digital data output (see registers 0x1A and 0x1B)
SUP Negative supply for internal analog circuits; connected to GND
INP Supply for I/O communications (1.8 V to V
BID I/O pin for parallel communication
BID I/O pin for parallel communication
I/O pin for parallel communication
BID
TX enable (in special direct mode)
I/O pin for parallel communication
BID
TX data (in special direct mode)
I/O pin for parallel communication
BID
Slave select signal in SPI mode
I/O pin for parallel communication
BID
Data clock output in direct mode 1 and special direct mode
I/O pin for parallel communication
BID MISO for serial communication (SPI)
Serial bit data output in direct mode 1 or subcarrier signal in direct mode 0
I/O pin for parallel communication.
BID
MOSI for serial communication (SPI)
Selection of power down mode. If EN2 is connected to V
INP
down mode 2 (for example, to supply the MCU).
INP Data clock input for MCU communication (parallel and serial)
If EN = 1 (EN2 = don't care) the system clock for MCU is configured. Depending on the crystal
that is used, options are as follows (see register 0x09):
OUT
13.56-MHz crystal: Off, 3.39 MHz, 6.78 MHz, or 13.56 MHz
27.12-MHz crystal: Off, 6.78 MHz, 13.56 MHz, or 27.12 MHz
If EN = 0 and EN2 = 1, then system clock is set to 60 kHz
INP Chip enable input (If EN = 0, then chip is in sleep or power-down mode).
SUP Negative supply for internal digital circuits
OUT Crystal or oscillator output
INP Crystal or oscillator input
OUT Crystal oscillator output
Internally regulated supply (2.7 V to 3.4 V) for digital circuit and external devices (for example,
OUT
an MCU)
SUP Chip substrate ground
Submit Documentation Feedback
Product Folder Links:
SLOS743L – AUGUST 2011 – REVISED MARCH 2017
DESCRIPTION
) level shifter. V should be never exceeded.
IN IN
, then V
IN
Terminal Configuration and Functions
TRF7970A
TRF7970A
is active during power
DD_X
9