Texas Instruments TRF7970A Manual page 38

TRF7970A
SLOS743L – AUGUST 2011 – REVISED MARCH 2017
6.10.4 Data Transmission From MCU to TRF7970A
Before beginning data transmission, the FIFO should always be cleared with a reset command (0x0F).
Data transmission is initiated with a selected command (see
reader to do a continuous write command (0x3D) starting from register 0x1D. Data written into register
0x1D is the TX Length Byte 1 (upper and middle nibbles), while the following byte in register 0x1E is the
TX Length Byte 2 (lower nibble and broken byte length) (see
TX byte length determines when the reader sends the end of frame (EOF) byte. After the TX length bytes
are written, FIFO data is loaded in register 0x1F with byte storage locations 0 to 127. Data transmission
begins automatically after the first byte is written into the FIFO. The loading of TX length bytes and the
FIFO can be done with a continuous-write command, as the addresses are sequential.
At the start of transmission, the flag B7 (IRQ_TX) is set in the IRQ Status register, and at the end of the
transmit operation, an interrupt is sent to inform the MCU that the task is complete.
6.10.5 Serial Interface Communication (SPI)
When an SPI interface is used, I/O pins I/O_2, I/O_1, and I/O_0 must be hard wired according to
10. On power up, the TRF7970A looks for the status of these pins and then enters into the corresponding
mode.
The serial communications work in the same manner as the parallel communications with respect to the
FIFO, except for the following condition. On receiving an IRQ from the reader, the MCU reads the
TRF7970A IRQ Status register to determine how to service the reader. After this, the MCU must to do a
dummy read to clear the reader's IRQ status register. The dummy read is required in SPI mode because
the reader's IRQ status register needs an additional clock cycle to clear the register. This is not required in
parallel mode because the additional clock cycle is included in the Stop condition. When first establishing
communications with the TRF7970A, the SOFT_INIT (0x03) and IDLE (0x00) commands should be sent
first from the MCU (see
The procedure for a dummy read is as follows (see
1. Start the dummy read:
(a) When using slave select (SS): set SS bit low.
(b) When not using SS: start condition is when Data Clock is high (see
2. Send address word to IRQ status register (0x0C) with read and continuous address mode bits set to 1
(see Table 6-10).
3. Read 1 byte (8 bits) from IRQ status register (0x0C).
4. Dummy-read 1 byte from register 0x0D (collision position and interrupt mask).
5. Stop the dummy read:
(a) When using slave select (SS): set SS bit high.
(b) When not using SS: stop condition when Data Clock is high.
38 Detailed Description
Table 6-19).
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Section 6.14). The MCU then commands the
Table 6-57 and
Figure 6-17 and Figure 6-18):
Table
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TRF7970A
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Table 6-58) . Note that the
Table 6-
6-10).