Texas Instruments TRF7970A Manual page 64

TRF7970A
SLOS743L – AUGUST 2011 – REVISED MARCH 2017
6.15.3.2.8 Modulator and SYS_CLK Control Register (0x09)
The frequency of SYS_CLK (pin 27) is programmable by the bits B4 and B5 of this register. The frequency
of the TRF7970A system clock oscillator is divided by 1, 2 or 4 resulting in available SYS_CLK
frequencies of 13.56 MHz or 6.78 MHz or 3.39 MHz.
The ASK modulation depth is controlled by bits B0, B1 and B2. The range of ASK modulation is 7% to
30% or 100% (OOK). The selection between ASK and OOK (100%) modulation can also be done using
direct input OOK (pin 12). The direct control of OOK/ASK using OOK pin is only possible if the function is
enabled by setting B6 = 1 (en_ook_p) in this register (0x09) and the ISO Control Register (0x01, B6 = 1).
When configured this way, the MOD (pin 14) is used as input for the modulation signal.
Table 6-36 describes the Modulator and SYS_CLK Control register.
Table 6-36. Modulator and SYS_CLK Control Register (0x09)
Function: Controls the modulation input and depth, ASK / OOK control and clock output to external system (MCU)
Default: 0x91 at POR = H or EN = L, and at each write to ISO control register, except Clo1 and Clo0.
Bit Name
B7 27MHz Enables 27.12-MHz crystal
1 = Enables external
selection of ASK or OOK
B6 en_ook_p modulation
0 = Default operation as
defined in B0 to B2 (0x09)
SYS_CLK output frequency
B5 Clo1
MSB
SYS_CLK output frequency
B4 Clo0
LSB
1 = Sets pin 12 (ASK/OOK)
B3 en_ana as an analog output
0 = Default
B2 Pm2 Modulation depth MSB
B1 Pm1 Modulation depth
B0 Pm0 Modulation depth LSB
64 Detailed Description
Function
Default = 1 (enabled)
Enable ASK/OOK pin (pin 12) for "on the fly change" between any preselected
ASK modulation as defined by B0 to B2 and OOK modulation:
If B6 is 1, pin 12 is configured as follows:
1 = OOK modulation
0 = Modulation as defined in B0 to B2 (0x09)
Clo1
0
0
1
1
For test and measurement purpose. ASK/OOK pin 12 can be used to monitor
the analog subcarrier signal before the digitizing with DC level equal to AGND.
Pm2
0
0
0
0
1
1
1
1
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Description
SYS_CLK Output
Clo0 (if 13.56-MHz
crystal is used)
0 Disabled
1 3.39 MHz
0 6.78 MHz
1 13.56 MHz
Pm1
0
0
1
1
0
0
1
1
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TRF7970A
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SYS_CLK Output
(if 27.12-MHz
crystal is used)
Disabled
6.78 MHz
13.56 MHz
27.12 MHz
Pm0 Mod Type and %
0 ASK 10%
1 OOK (100%)
0 ASK 7%
1 ASK 8.5%
0 ASK 13%
1 ASK 16%
0 ASK 22%
1 ASK 30%