LG MG200 Service Manual page 31

3. H/W CIRCUIT DESCRIPTION
3.5.6 Voltage Regulation (VREG)
There are 7 LDO (Low Drop Output) regulators in ABB chip.
The output of these 7 LDOs are as following table. (Figure14) shows the power supply related
blocks of DBB/ABB and their interfaces in MG200.
VBAT
VCRAM
VCMEM
UPR
Sel 2.8V
VLMEM
Sel 1.8V
VCDBB
VCABB
VBACKUP
BACKUP
BK : Regulators ON in BACKUP / SLEEP / NORMAL mode
SL : Regulators ON in SLEEP / NORMAL mode
SLP : Idem SL + reverse current protection
: Regulators ON in NORMAL mode
: Reserved for TWL3025 private use only
ABB
RSIM
1.8/2.9V
10 mA
SL
RRAM
1.8/2.8V
50 mA
SL
RMEM
1.8/2.8V
60 mA
SL
RDBB
1.3/1.5
120 mA
SL
VLRTC
VCIO1 RIO
2.8V
VCIO2
100 mA
SL
ABB
Digital
VBAT
core I/O
ABB
Analog core
RABB
2.8V
50 mA
NM
BBS
RRTC
ABB
1.3/1.5V
VRPC core
10
BK
Figure 16. Power Supply Scheme
- 30 -
VRSIM
SIM CARD
1
VRRAM
SRAM Core
Memories I/O
VRMEM
4.7
VSDBB
VRDBB
10
VRIO1
VRIO2
10
VRABB
4.7
UPR
1
VLRTC
Sel 1.8V
Sel 1.5V
VLRTC
VDD-RTC
1
VDDS-RTC
Core
DBB Memories I/O
DBB Core
DBB I/O
DBB split power
Low Power domain
DBB Backup
RTC
I/O RTC