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3.2.3 Synthesizer
The RF main chipset includes a fully integrated VCO with an on-chip LC tank. A fractional-N
synthesizer can phase lock the local oscillator used in both transmit and receive path to a precision
frequency reference input. The fractional-N operation offers low phase noise and fast setting times,
allowing for multiple slot applications such as GPRS. The counter and mode settings of the
synthesizer are also programmed via 3-wire interface.
I
90o
O
IF
Programmable IF filter
(62.8 MHz ~ 152.2 MHz)
M
divider
R
divider
PFD
26 MHz
MAIN PLL
PFD
MAIN VCO 2
@ 3.80 GHz
Programmable
MAIN VCO 1
MAIN loop filter
@ 3.37 GHz
N (=B*P + A)
divider
Figure 2. Block diagram of Synthesizer Part
- 15 -
3. H/W CIRCUIT DESCRIPTION
TX LB VCO
= TX GSM 850 / TX GSM 900
TX HB VCO
= TX DCS 1800 / TX PCS 1900
PAD
LO
TX GSM 850 [824.2~837.0 MHz]===> MAINVCO2, L=4, M=26, R=55, N=8242~8370, TXLBVCO
TX GSM 850 [837.2~848.8 MHz]===> MAINVCO2, L=4, M=52, R=30, N=4186~4244, TXLBVCO
TX GSM 900 [880.2~914.8 MHz]===> MAINVCO1, L=4, M=52, R=35, N=4401~4574, TXLBVCO
TX DCS 1800 [1710.2~1784.8 MHz]===> MAINVCO1, L=2, M=26, R=70, N=8551~8924, TXHBVCO
TX PCS 1900 [1850.2~1909.8 MHz]===> MAINVCO1, L=2, M=26, R=70, N=9251~9549, TXHBVCO
L
divider
TX GSM 850 [869.2~893.8 MHz]===> MAINVCO1, L=4, R=65, N=8692~8938
TX GSM 900 [925.2~959.8 MHz]===> MAINVCO2, L=4, R=65, N=9252~9598
TX DCS 1800 [1805.2~1879.8 MHz]===> MAINVCO2, L=2, R=65, N=9026~9399
TX PCS 1900 [1930.2~1989.8 MHz]===> MAINVCO2, L=2, R=65, N=9651~9949
toward RX mixers
toward PAs
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