Casio TE-7000S Service Manual page 35

LCD INTERFACE
Pin Names Type Pin#
30, 31, 32,
FPDAT[7:0] O 33, 34, 35,
36, 37
FPDAT O, 24, 25, 26
[10:8] IO
FPDAT11 O, 23
IO
FPFRAME O 39
FPLINE O 38
FPSHIFT O 28
LCDPWR O 43
DRDY O 42
CLOCK INPUT
Pin Names Type Pin#
CLKI I 51
MISCELLANEOUS
Pin Names Type Pin#
CNF[3:0] I 46, 47,
48, 49
GPIO0 IO, 22
I
TESTEN I 44
POWER SUPPLY
Pin Names Type Pin#
COREVDD P 1, 21, 41,
61
IOVDD P 10, 29, 52
20, 27, 40,
VSS P 50, 60, 72,
80
Cell RESET#
State
CN3 0 Panel Data
These pins have multiple functions.
• Panel Data bits [10:8] for TFT/D-TFD panels.
CN3 Input • General Purpose Input/Output pins GPIO[3:1].
These pins should be connected to IO V DD when unused.
This pin has multiple functions.
• Panel Data bit 11 for TFT/D-TFD panels.
CN3 Input • General Purpose Input/Output pin GPIO4.
• Inverse Video select pin.
This pin should be connected to IO V DD when unused.
CN3 0 Frame Pulse
CN3 0 Line Pulse
CN3 0 Shift Clock
CO1 0 Active high LCD Power Control
This pin has multiple functions.
• TFT/D-TFD Display Enable (DRDY).
CN3 0 • LCD Backplane Bias (MOD).
• Second Shift Clock (FPSHIFT2).
DRIVER
C Input Clock
Cell RESET#
State
These inputs are used to configure the S1D13705 - see Table
C As set by 5-1: "Summary of Power On/Reset Options," on page 22.
hardware Must be connected directly to IO V
This pin has multiple functions - see REG[03h] bit 2.
CS/ Input • General Purpose Input/Output pin.
TS1 • Hardware Power Save.
TEST pulled low Test Enable input. This input must be connected to V
DRIVER
P Core V
DD
P IO V
DD
P Common V
— 33 —
Description
Description
Description
or V
DD
Description
SS
.
SS
.
SS