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Chapter 7
Digital Routing
•
Counter 1 Gate Signal
•
Counter 1 Up/Down Signal
•
Master Timebase Signal
You also can control these timing signals with signals generated internally to the DAQ-STC, and
these selections are fully software-configurable. For example, the signal routing multiplexer for
controlling the ao/SampleClock signal is shown in Figure 7-1.
Figure 7-1. Signal Routing Multiplexer on Analog Output Devices
RTSI Trigger <0..6>
Ctr1InternalOutput
Figure 7-1 shows that you can generate the ao/SampleClock signal from a number of sources,
including the external signals RTSI <0..6>, PFI <0..9>, and the internal signals, Onboard Clock,
and Ctr1InternalOutput. Here, the Onboard Clock is derived by dividing down the
ao/SampleClockTimebase signal.
Many of these timing signals are also available as outputs on the PFI pins.
The Master Timebase signal can only be accepted as an external signal over
Note
RTSI. For more information on the Master Timebase signal, refer to the
Timebase Signal
section of Chapter 8,
routing this signal.
7-2 | ni.com
PFI <0..9>
Onboard Clock
section of Chapter 5, Counters. Refer to the
Real-Time System Integration Bus
ao/Sample Clock
Master
Device and RTSI Clocks
(RTSI), for information on
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