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Chapter 5
Counters
Figure 5-4 shows the timing requirements for the Ctr0Gate signal.
Rising-Edge
Falling-Edge
Counter 0 Internal Output Signal
The Counter 0 Internal Output (Ctr0InternalOutput) signal is the output of Counter 0. This signal
reflects the terminal count (TC) of Counter 0. The counter generates a terminal count when its
count value rolls over. The two software-selectable output options are pulse on TC and toggle
output polarity on TC. The output polarity is software-selectable for both options. Figure 5-5
shows the behavior of the Ctr0InternalOutput signal.
Ctr0Source
Ctr0InternalOutput
(Pulse on TC)
Ctr0InternalOutput
(Toggle Output on TC)
You can use Ctr0InternalOutput in the following applications:
•
In pulse generation mode, the counter drives Ctr0InternalOutput with the generated pulses.
To enable this behavior, software configures the counter to toggle Ctr0InternalOutput
on TC.
•
Counter 0 and 1 can be daisy-chained together by routing Ctr0InternalOutput to Ctr1Gate.
•
Ctr0InternalOutput can drive any of the RTSI <0..6> signals to control the behavior of other
devices in the system.
•
Ctr0InternalOutput drives the CTR 0 OUT pin to trigger or control external devices.
•
Ctr0InternalOutput can drive other internal signals.
Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more
information.
5-4 | ni.com
Figure 5-4. Ctr0Gate Timing Requirements
Polarity
Polarity
Figure 5-5. Ctr0InternalOutput Signal Behavior
t
w
t
= 10 ns minimum
w
TC
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