Philips 32PF9968/10 Service Manual page 99

Circuit Diagrams and PWB Layouts
SSB: FPGA 1080p: I/O Banks
1 2 3
FPGA 1080P: I/O BANKS
B05C
A
+3V3-FPGA
7F90-1
EP2C5F256C7N
Φ
CONTROL
DV-CLK-PLL 9F50 H2 G5
0 CE
H1 M13
IF50
3F75 IF51 1 STATUS
PCI-CLK-PNX5050_CLK-MOP J2
B 2
J1 J5
47R 3 CONFIG
H16 L13
DV-CLK CLK
4 CONF_DONE
H15
5
J15 J13
IF52 6 0
J16 MSEL K12
7 1
F2
TCK
DATA0 F1 G1
DATA0 TMS
H4 G2
DCLK
DCLK TDO
H5
TDI
C
D
7F90-6
EP2C5F256C7N
Φ
POWER
B1 A1
+3V3-FPGA
G3 A16
K3 VCCIO1 B15
R1 B2
C8
A15 GND C9
+2V5out-FPGA
A2 E8
C10 E9
E
C7 VCCIO2 G8
E10 H14
E7 H3
H8
B16 H9
+Vin-FPGA
G14 J14
GND
K14 VCCIO3 J3
R16 J8
J9
M10 K9
+3V3-FPGA
M7 M8
P10 M9
P7 VCCIO4 P8
T15 P9
F
T2 GND R15
R2
G9 T1
+1V2-FPGA
H10 T16
H7 VCCINT
J7 L5
GND_PLL1 N5
M5
+1V2-PLL 1
E12 VCCA_PLL D12
2
GND_PLL2 F12
L6
1
F11 VCCD_PLL M6
2 1
GNDA_PLL E11
2
G
H
3104 313 6196.2
1 2 3
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Q523.1U LA 7.
4 5 6 7
+3V3 ASDO C3
3F76 IO_C3|ASDO
nCSO F4
+3V3-FPGA
IO_F4|CSO_
SD1-DQ9 P1
10K
IO_P1|LVDS0p
nCONFIG P2
SD1-CS
IO_P2|LVDS0n
CONF-DONE N1
SD1-DQ10
IO_N1|LVDS1p
N2
SD1-A5
IO_N2|LVDS1n
9F51 SD1-DQ13 L1
IF89 IO_L1|LVDS2p
MSEL1 MSEL1 SD1-DQ14 L2
IO_L2|LVDS2n
SD1-DQM K4
IO_K4|LVDS3p
TCK SD1-CKE K5
IO_K5|LVDS3n
TMS SD1-DQ15 K1
IO_K1|LVDS4n
TDO K2
SD1-DQ16
IO_K2|LVDS4p
TDI 3F93 E1
SDA-AMBI-3V3 100R
IO_E1|LVDS5p
3F94 E2
SCL-AMBI-3V3 100R
IO_E2|LVDS5n
D3
IF53 IO_D3|LVDS6p
D4
IO_D4|LVDS6n
C4
IO_C4|LVDS10p
C5
IO_C5|LVDS10n
G7
+1V2-FPGA IO_G7|LVDS11p
G6
IO_G6|LVDS11n
F9
IO_F9|LVDS12p
F10
IO_F10|LVDS12n
E6
IO_E6|LVDS13p
F6
+1V2-PLL IO_F6|LVDS13n
TxFPGAeE+ A3
IO_A3|LVDS14p
TxFPGAeE- B3
IO_B3|LVDS14n
TxFPGAeD+ A4
IO_A4|LVDS15p
TxFPGAeD- B4
IO_B4|LVDS15n
TxFPGAeCLK+ A5
IO_A5|LVDS16p
TxFPGAeCLK- B5
IO_B5|LVDS16n
TxFPGAeB+
C6
IO_C6|LVDS17p
TxFPGAeB- D6
IO_D6|LVDS17n
TxFPGAeC+ A6
IO_A6|LVDS18p
TxFPGAeC- B6
IO_B6|LVDS18n
F8
IO_F8|LVDS19p
F7
IO_F7|LVDS19n
TxFPGAeA+ B7
IO_B7|LVDS20p
TxFPGAeA- A7
IO_A7|LVDS20n
4 5 6 7
99
8 9 10
7F90-2
EP2C5F256C7N
Φ
BANK1
E3 DV-HS
IO_E3|LVDS7p IF54
E4 DV-FF_DE
IO_E4|LVDS7n IF55
D5 DV-B0_UART2-RX
IO_D5|LVDS8p
E5 DV-VS
+1V2-PLL
IO_E5|LVDS8n
C1 SDA-SSB DV-B5_UV1
3F95 100R
IO_C1|LVDS9p
C2 3F98 100R SCL-SSB DV-B4_UV0
IO_C2|LVDS9n
L4 SD1-CLK
IO_L4|PLL1_OUTp
M4
IO_M4|PLL1_OUTn
F3 DV-B3_AUDIO-MUTE
IO_F3|VREFB1N0
J4 DV-B2_DEBUG-BREAK
IO_J4|VREFB1N1 IF73
L3 SD1-A9 DV-B6_Y0
IO_L3
M1 SD1-DQ11 DV-B7_Y1
IO_M1
M2 SD1-DQ12 DV-G2_UV4
IO_M2
M3 SD1-A8 DV-G0_UV2
IO_M3
P3 SD1-A4 DV-G4_UV6
IO_P3
DV-G3_UV5
DV-G5_UV7
DV-G6_UV8
7F90-3
EP2C5F256C7N
Φ
BANK2
B9
IO_B9|LVDS21p IF74
A9
IO_A9|LVDS21n IF75
D10 TxFPGAoD+
IO_D10|LVDS22p
D11 TxFPGAoD- MP-LED5
IO_D11|LVDS22n
A10 TxFPGAoE+
IO_A10|LVDS23p
B10 TxFPGAoE- MP-LED3
IO_B10|LVDS23n
G11 +1V2-FPGA MP-LED4
IO_G11|LVDS24p
G10 MP-LED1
IO_G10|LVDS24n
A12 TxFPGAoCLK+ MP-LED2
IO_A12|LVDS25p
B12 TxFPGAoCLK-
IO_B12|LVDS25n
A13 TxFPGAoC+
IO_A13|LVDS26p
B13 TxFPGAoC-
IO_B13|LVDS26n
C12 TxFPGAoB+
IO_C12|LVDS27p
C13 TxFPGAoB- CTRL2-FPGA
IO_C13|LVDS27n
TxFPGAoA+ CTRL1-FPGA
A14
IO_A14|LVDS28p
B14 TxFPGAoA-
IO_B14|LVDS28n
D8
IO_D8|VREFB2N1
C11 CTRL3-FPGA
IO_C11|VREFB2N0
A8 CTRL4-FPGA
IO_A8
A11
IO_A11
B11
IO_B11
SD1-DQ1
SD1-DQ2
8 9 10
11 12 13 14
B05C
7F90-4
EP2C5F256C7N
Φ
BANK3
D13 M16 DV-R0_Y2
IO_D13|LVDS29p IO_M16|LVDS38p
C14 M15 DV-R1_Y3
IO_C14|LVDS29n IO_M15|LVDS38n
9F52 RES D16 N16 DV-R3_Y5
IO_D16|LVDS30p IO_N16|LVDS39p
D15 N15 DV-R4_Y6
IO_D15|LVDS30n IO_N15|LVDS39n
G13 P16
IO_G13|LVDS31p IO_P16|LVDS40p
G12 P15
IO_G12|LVDS31n IO_P15|LVDS40n IF76
H11 N14 DV-R5_Y7
+1V2-FPGA
IO_H11|LVDS32p IO_N14|LVDS41p
J11 N13 DV-R6_Y8
IO_J11|LVDS32n IO_N13|LVDS41n
9F53 RES F16 M12
+1V2-PLL
IO_F16|LVDS33p IO_M12|LVDS42p
9F54 RES F15 N12
IO_F15|LVDS33n IO_N12|LVDS42n
G15 M14 DV-R2_Y4
IO_G15|LVDS34p IO_M14|VREFB3N1
G16 H13 DV-G1_UV3
IO_G16|LVDS34n IO_H13|VREFB3N0
J12 E14 DV-CLK-PLL
IO_J12|LVDS35p IO_E14|PLL2_OUTp
H12 D14 IF78
IO_H12|LVDS35n IO_D14|PLL2_OUTn
K15 E16 9F92 RES DV-B1_UART2-TX
IO_K15|LVDS36p IO_E16
K16 L14 DV-G7_UV9
IO_K16|LVDS36n IO_L14
L16 P14 DV-R7_Y9
IO_L16|LVDS37p IO_P14
L15
IO_L15|LVDS37n
7F90-5
EP2C5F256C7N
Φ
BANK4
M11 T7 SD1-DQ4
IO_M11|LVDS43p IO_T7|LVDS54p
L11 R7 SD1-DQ3
+1V2-PLL
IO_L11|LVDS43n IO_R7|LVDS54n
T14 T5 SD1-DQ6
IO_T14|LVDS44p IO_T5|LVDS55p
R14 R5 SD1-DQ7
IF81 IO_R14|LVDS44n IO_R5|LVDS55n
T13 T4 SD1-DQ8
IO_T13|LVDS45p IO_T4|LVDS56p
R13 R4 SD1-WE
IO_R13|LVDS45n IO_R4|LVDS56n
T12 P5 SD1-A2
IO_T12|LVDS46p IO_P5|LVDS57p
R12 P4 SD1-A3
IO_R12|LVDS46n IO_P4|LVDS57n
P12 T3 SD1-CAS
IF82 IO_P12|LVDS47p IO_T3|LVDS58p
P13 R3 SD1-RAS
IF83 IO_P13|LVDS47n IO_R3|LVDS58n
K11 N9 9F93 DV-CLK-PLL
IO_K11|LVDS48p IO_N9|LVDS59p
K10 N10
+1V2-FPGA IF84
IO_K10|LVDS48n IO_N10|LVDS59n
R10 L7
+1V2-FPGA
IO_R10|LVDS49p IO_L7|LVDS60p
T10 L8
IO_T10|LVDS49n IO_L8|LVDS60n
L9 N11
IO_L9|LVDS50p IO_N11|VREFB4N0
L10 N8
IO_L10|LVDS50n IO_N8|VREFB4N1
T11 L12
IO_T11|LVDS51p IO_L12
R11 P11
IO_R11|LVDS51n IO_P11
IF85
T9 T6 SD1-DQ5
IF86 IO_T9|LVDS52p IO_T6
R9
IO_R9|LVDS52n
T8
IO_T8|LVDS53p
R8
IO_R8|LVDS53n
7F90-7
EP2C5F256C7N
Φ
NC
B8 H6
C15 J10
IF87 +1V2-FPGA
C16 J6
IF88
D1 K13
D2 K6
D7 K7
D9 K8
+1V2-FPGA
NC NC
E13 N3 SD1-A6
E15 N4 SD1-A7
F13 N6 SD1-A1
F14 N7 SD1-A10
F5 P6 SD1-A11
G4 R6 SD1-A0
H_16770_037.eps
11 12 13 14
3F75 B2
3F76 B4
3F77 B2
3F78 C2
3F93 C6
3F94 C6
3F95 B9
3F98 B9
7F90-1 A3
A 7F90-2 B7
7F90-3 D7
7F90-4 B12
7F90-5 D12
7F90-6 D3
7F90-7 G12
9F50 B2
9F51 B4
9F52 B11
9F53 B11
9F54 C11
B
9F92 C13
9F93 E13
9F94 B5
9F95 C5
IF50 B2
IF51 B2
IF52 B2
IF53 C7
IF54 B8
IF55 B8
IF73 C8
C
IF74 D8
IF75 D8
IF76 B13
IF78 C13
IF81 E11
IF82 E11
IF83 E11
IF84 E13
IF85 F13
IF86 F11
IF87 G11
D
IF88 G11
IF89 B4
E
F
G
H
190307