Philips 32PF9968/10 Service Manual page 147

Chassis q523.1u
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Circuit Descriptions, Abbreviation List, and IC Data Sheets
The HDMI receiver interface supports the capture of signals
compliant with the HDMI V1.1 specification. It consists of two
blocks:
Block HDMI-RX contains the de-serializer, HDCP, audio
and video data capture and info packet extraction, together
with audio formatting.
Block HDMI-RX2DTL allows captured video data to be
stored in memory.
The Memory Based Video Processor TV (MBVP_L2TV) is
used on the main video channel for de-interlacing and scaling
of images, together with video measurement functions.
The Video Composition Pipe TV (CPIPE_L2TV) is used to
perform picture improvements on video and merge the video
layer and 2 graphics layers into a single stream.
9.6.2
Audio Subsystem
Refer to figure "Audio flow diagram" for a clarification of the
blocks that are used in this device.
xx
Figure 9-13 PNX85xx audio flow diagram
Q523.1U LA
The Flat Panel DIsplay-LVDS (FPD-LVDS) provides a serial
interface for 10-bit RGB output data towards the LCD panel
with a data rate of 90 Mpixels/s max.
The Memory Based Video Processor VO (MBVP_2LVO) is
used on the main video channel for scaling of images for
monitor out.
The Video Composition Pipe VO (CPIPE_VO) is used to merge
a video and a graphics layer into a single stream together with
insertion of VBI and CGMS data.
The Digital Encoder (DENC) supports encoding of a digital
video stream from the CPIPE_VO into Analog CVBS or Y/C.
9.
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