Intel 80C186EC Manual page 14

16-bit high-integration embedded processors
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80C186EC 188EC 80L186EC 188EC
Pin
Pin Name
Type
P3 1 TXI1
O
P3 0 RXI1
O
WDTOUT
O
P2 7 CTS1
I O
P2 3 CTS0
P2 6 BCLK1
I O
P2 2 BCLK0
P2 5 TXD1
I O
P2 1 TXD0
P2 4 RXD1
I O
P2 0 RXD0
DRQ3 0
I
NOTES
1 READY is A(E) for the rising edge of CLKOUT S(E) for the falling edge of CLKOUT
2 Pin names in parentheses apply to the 80C188EC 80L188EC
14
Table 2 Pin Descriptions (Continued)
Input
Output
Type
States
H(X) H(Q)
Transmit Interrupt output goes active to indicate that
serial channel 1 has completed a transfer TXI1 is
R(0)
multiplexed with an output only Port function
I(Q)
P(X)
H(X) H(Q)
Receive Interrupt output goes active to indicate that
serial channel 1 has completed a reception RXI1 is
R(0)
multiplexed with an output only port function
I(Q)
P(X)
H(Q)
WatchDog Timer OUTput is driven low for four clock
cycles when the watchdog timer reaches zero WDTOUT
R(1)
may be ANDed with the power-on reset signal to reset the
I(Q)
processor when the watchdog timer is not properly reset
P(X)
A(L)
H(X)
Clear-To-Send input is used to prevent the transmission
of serial data on the TXD signal pin CTS1 and CTS0 are
R(Z)
multiplexed with an I O Port function
I(X)
P(X)
A(L)
H(X)
Baud CLocK input can be used as an alternate clock
source for each of the integrated serial channels The
A(E)
R(Z)
BCLK inputs are multiplexed with I O Port functions The
I(X)
BCLK input frequency cannot exceed
P(X)
frequency of the processor
A(L)
H(Q)
Transmit Data output provides serial data information
The TXD outputs are multiplexed with I O Port functions
R(Z)
During synchronous serial communications TXD will
I(X) I(Q)
function as a clock output
P(X)
A(L)
H(X) H(Q)
Receive Data input accepts serial data information The
RXD pins are multiplexed with I O Port functions During
R(Z)
synchronous serial communications RXD is bi-directional
I(X) I(Q)
and will become an output for transmission of data (TXD
P(X)
becomes the clock)
A(L)
DMA ReQuest input pins are used to request a DMA
transfer The timing of the request is dependent on the
programmed synchronization mode
Pin Description
the operating

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