Supermicro X10DRG-O+-CPU User Manual page 95

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Chapter 4: AMI BIOS
PCIe/PCI/PnP Confi guration
PCI Devices Common Settings
PCI Latency Timer
Select Enabled to set the latency timer for PCI. The options are 32 PCI Bus Clocks,
64 PCI Bus Clocks, 96 PCI Bus Clocks, 128 PCI Bus Clocks, 160 PCI Bus Clocks,
192 PCI Bus Clocks, 224 PCI Bus Clocks, and 248 PCI Bus Clocks.
PERR# Generation
Select Enabled to support PERR (PCI/PCI-E Parity Error)/SERR (System Error)
runtime error reporting for a PCI/PCI-E slot. The options are Disabled and Enabled.
SERR# Generation
Select Enabled to support PERR (PCI/PCI-E Parity Error)/SERR (System Error)
runtime error reporting for a PCI/PCI-E slot. The options are Disabled and Enabled.
PCI PERR/SERR Support
Select Enabled to support PERR (PCI/PCI-E Parity Error)/SERR (System Error)
runtime error reporting for a PCI/PCI-E slot. The options are Disabled and Enabled.
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G
Address. The options are Disabled and Enabled.
SR-IOV (Available if the system supports Single-Root Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Disabled
and Enabled.
Maximum Payload
Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are Auto, 128
Bytes, and 256 Bytes.
Maximum Read Request
Select Auto for the system BIOS to automatically set the maximum size for a read
request for a PCI-E device to enhance system performance. The options are Auto,
128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
ASPM Support
Use this item to set the Active State Power Management (ASPM) level for a PCI-E
device. Select Auto for the system BIOS to automatically set the ASPM level based
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