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5 DETAILS AND SETTING OF FUNCTIONS
5.1.2 Input pulse count operation
Module READY
(X0)
Operating condition setting
complete flag
(X1)
Count enable
(Y18)
Input pulse value
(Buffer memory address:10,11)
Sampling pulse number
(Buffer memory address:0)
5
Accumulating count value
(Buffer memory address:8,9)
5 - 2
This section explains the input pulse count operation of the QD60P8-G. (For CH1)
ON
OFF
1)
OFF
OFF
Number
When the operating condition setting complete flag (X1) turns ON, pulse count
operation is enabled.
1)
If any setting value or similar is in error, count operation cannot be performed
since the operating condition setting complete flag (X1) does not turn ON.
2)
When the count enable (Y18) is turned ON, the count operation of CH1 starts.
3)
The count enable (Y18) turns OFF and pulse count operation stops.
4)
The count enable (Y18) turns ON and pulse count operation is restarted.
The indications of the "sampling pulse number" and "accumulating count
value" of the buffer memory are updated in the cycle set in the "count cycle
5)
setting value" of the buffer memory. (Refer to Section 5.1.4)
(The update timing of the "input pulse value" of the buffer memory is fixed at
10ms.)
REMARK
In the pulse count operation of the QD60P8-G, is delayed due to the control cycle
(10ms). Refer to Section 5.9 for details.
ON
ON
2)
Count indication start
5)
10ms
5)
Count cycle setting value
(Buffer memory address:24)
5)
Count cycle setting value
(Buffer memory address:24)
Details
MELSEC-Q
3)
4)
Count indication start
Count indication start
5 - 2
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