Mitsubishi Electric MELSEC iQ-R Series Safety Function Block Reference page 106

Typical timing diagram
■ For M+SF_EQUI_R
i_bActivate
i_bS_ChannelA
i_bS_ChannelB
i_dDiscrepancyTime
o_bReady
o_bS_EquivalentOut
o_bError
0000H 8001H 8004H 8000H 8000H 8005H 8001H 8001H 8014H 8000H 8000H 8005H 8001H 8001H
o_wDiagCode
i_bActivate
i_bS_ChannelA
i_bS_ChannelB
i_dDiscrepancyTime
o_bReady
o_bS_EquivalentOut
o_bError
8001H
o_wDiagCode
A program operation is suspended while the operation status of the CPU module is in STOP or PAUSE. Consequently,
measurement of the i_dDiscrepancyTime elapsed time is stopped.
Error behavior
In the event of an error, the output signals behave as listed below.
Output signal
o_bReady
o_bS_EquivalentOut
o_bError
For the corrective actions, see the following.
Page 105 List of error codes
4 SAFETY FB SPECIFICATIONS
104
4.15 M+SF_EQUI_R
8004H 8004H C001H C001H C001H C001H C001H C001H 8001H 8001H 8000H 8005H 8001H
Status
ON
OFF
ON