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tx_pma_cal_busy_pio_external_connection_exp
ort
tx_pma_ch_export
tx_rcfg_en_pio_external_connection_export
tx_iopll_rcfg_mgmt_translator_avalon_anti_s
lave_writedata
tx_iopll_rcfg_mgmt_translator_avalon_anti_s
lave_address
tx_iopll_rcfg_mgmt_translator_avalon_anti_s
lave_write
tx_iopll_rcfg_mgmt_translator_avalon_anti_s
lave_read
tx_iopll_rcfg_mgmt_translator_avalon_anti_s
lave_readdata
tx_os_pio_external_connection_export
tx_rst_pll_pio_external_connection_export
tx_rst_xcvr_pio_external_connection_export
wd_timer_resetrequest_reset
color_depth_pio_external_connection_export
tx_hpd_ack_pio_external_connection_export
tx_hpd_req_pio_external_connection_export
2.6 Design RTL Parameters
Use the HDMI TX and RX Top RTL parameters to customize the design example.
Most of the design parameters are available in the Intel FPGA HDMI Design Example
parameter editor. You can still change the design example settings you made in the
parameter editor through the RTL parameters.
®
Intel
FPGA HDMI Design Example User Guide for Intel
36
Signal
®
Arria 10 Devices
2 Intel FPGA HDMI Design Example Detailed Description
Direction
Width
Input
1
Output
2
Output
32
Output
9
Output
1
Output
1
Input
32
Output
2
Output
1
Output
1
Output
1
Input
2
Output
1
Input
1
UG-20077 | 2017.11.06
Description
TX PMA Recalibration Busy
TX PMA Channels
TX PMA Reconfiguration
Enable
TX IOPLL Reconfiguration
Avalon-MM interfaces
Oversampling factor:
•
0: No oversampling
•
1: 3× oversampling
•
2: 4× oversampling
•
3: 5× oversampling
Reset to IOPLL and TX PLL
Reset to TX Native PHY
Watchdog timer reset
Color depth
For TX hotplug detect
handshaking
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