Bootstrap Loader (Bsl); Flash Memory; Peripherals - Texas Instruments MSP430FG461x series Manual

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6.7

Bootstrap Loader (BSL)

The BSL lets users program the flash memory or RAM using a UART serial interface. Access to the MCU
memory through the BSL is protected by user-defined password. A bootstrap loader security key is
provided at address 0FFBEh to disable the BSL completely or to disable the erasure of the flash if an
invalid password is supplied. The BSL is optional for ROM-based devices. For complete description of the
features of the BSL and its implementation, see the application report Features of the MSP430 Bootstrap
Loader (SLAA089).
6.8

Flash Memory

The flash memory can be programmed by the JTAG port, the bootstrap loader, or in system by the CPU.
The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash
memory include:
Flash memory has n segments of main memory and two segments of information memory (A and B) of
128 bytes each. Each segment in main memory is 512 bytes in size.
Segments 0 to n may be erased in one step, or each segment may be individually erased.
Segments A and B can be erased individually, or as a group with segments 0-n. Segments A and B
are also called information memory.
New devices may have some bytes programmed in the information memory (needed for test during
manufacturing). The user should perform an erase of the information memory before the first use.
6.9

Peripherals

Peripherals are connected to the CPU through data, address, and control buses. Peripherals can be
handled using all instructions. For complete module descriptions, refer to the MSP430x4xx Family User's
Guide.
6.9.1 DMA Controller
The DMA controller allows movement of data from one memory address to another without CPU
intervention. For example, the DMA controller can be used to move data from the ADC12 conversion
memory to RAM. Using the DMA controller can increase the throughput of peripheral modules. The DMA
controller reduces system power consumption by allowing the CPU to remain in sleep mode without
having to awaken to move data to or from a peripheral.
Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links:
MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
BSLKEY
Erasure of flash disabled if an invalid password
00000h
is supplied
0AA55h
BSL disabled
any other value
BSL enabled
BSL FUNCTION
Data Transmit
Data Receiver
Submit Documentation Feedback
MSP430FG4619 MSP430FG4618 MSP430FG4617 MSP430FG4616 MSP430CG4619
MSP430CG4618 MSP430CG4617 MSP430CG4616
SLAS508J – APRIL 2006 – REVISED JUNE 2015
DESCRIPTION
PZ/ZQW PACKAGE PINS
87/A7 – P1.0
86/E7 – P1.1
Detailed Description
55

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