Texas Instruments TMS370 Series Family Manuals

Manuals and User Guides for Texas Instruments TMS370 Series Family. We have 4 Texas Instruments TMS370 Series Family manuals available for free PDF download: Application Book, Technical Reference, User Manual, Getting Started Manual

Texas Instruments TMS370 Series Application Book (565 pages)

Brand: Texas Instruments | Category: Microcontrollers | Size: 3.19 MB

Table of Contents
6
Part I: Introduction

20
- Introduction
  
  24
- Overview
  24
- Typical Applications
  24
- Typical Applications for TMS370 Family Microcontroller Devices
  24
Part II: Software Routines

26
RAM Self-Test Routine

86
- RAM Self-Test Routine
  88
- Register Values
  88
- ROM Checksum on the TMS370
  
  90
  - Register and Function Values
    92
Table Search with the TMS370

94
- Register and Expression Functions
  96
- Table Search with the TMS370
  
  98
- Bubble Sort with the TMS370
  
  98
  - Register Functions
    100
Specific Functionality

102
Routine to Read a 16-Key Keyboard 1. Keyboard Scan Connections to Port D

104
- Register Properties
  106
- Routine to Read a 16-Key Keyboard
  
  104
- DTMF Generation with the TMS370
  
  108
- System Integrity Check for the TMS370
  
  114
RESET Operations

120
Part III: Module Specific Application Design Aids

120
- Reset: Explanation of Operation and Suggested Designs
  
  120
- Cold Start
  122
- Osc Flt Flag
  122
- Wd Ovrfl Int Flag
  122
- General Operation
  122
Using the TMS370 SPI and SCI Modules 1. SPI Block Diagram

126
- Introduction
  128
- Module Description: Serial Peripheral Interface (SPI)
  129
- SPI Module Software Examples
  136
  - Common Equates
    136
  - Master SPI Configuration
    137
  - Slave SPI Configuration
    138
  - Dynamic Bit Justification
    139
  - Address Recognition by SPI Routine
    140
- SPI Module Specific Applications
  141
- SCI Module Description
  159
- SCI Block Diagram
  159
- SCI Data Frame Formats
  160
- Choosing SCI Protocols and Formats
  160
- Transmitter Character Bit Length
  161
  - The SCI SW RESET Bit
    161
  - Asynchronous Communication Format
    162
  - Lsosynchronous Communication Format
    162
  - Operating Modes of the SCI
    162
  - Asynchronous Baud Rate Register Values for Common SCI Baud Rates
    163
  - Setting the SCICLK Pins and Baud Rate
    163
  - SCI Receiver Operation
    164
  - Receiver Operation Flowchart
    165
  - SCI Transmitter Operation
    166
  - Transmitter Operation Flowchart
    167
  - SCI Interrupts and Flags
    168
  - Multiprocessor Communications
    169
  - Using the TXWAKE Bit
    170
  - Timing the Flow of Data
    171
  - What to Do with Transmission Errors
    172
- SCI Module Software Examples
  173
- SCI Module Specific Applications
  178
- SCI Module Specific Applications
  179
- TMS370C050 - RS 232 C Interface
  179
- Routine
  180
  - Terminal Interface Example
    183
  - Dumb-Terminal Driver
    183
  - Routine
    184
SPI and SCI Modules

126
- Using the TMS370 SPI and SCI Modules
  
  126
Remote Data Acquisition Example

191
- Low Power Remote Data Acquisition
  191
- SPI Control Registers
  197
- SCI Control Registers
  198
- TMS0170 Block Diagram
  200
Appendix C

200
- Shift Register
  201
- TMS0170 DIP Pin out
  202
- Electrical Characteristics over Operating Free Air Temperature Range
  203
  - Electrical Specifications
    203
    
    Glossary
    204
    
    References
    206
- Recommended Operating Conditions
  203
Fast Method to Determine Parity

208
- Register Values and Functions
  210
Automatic Baud Rate Calculation

212
- Format Parameters
  214
- SPI Port Interfacing
  214
- Automatic Baud Rate Calculation
  215
  - Automatic Baud Rate Routine
    215
  - SCI1 Control Registers
    215
  - Possible Improvements
    217
  - Autobaud Waveform
    217
- SCI Control Registers
  215
Timer and Watchdog Modules

220
Using the TMS370 Timer Modules

220
- Introduction
  222
- TMS370 Family Timer Module Capabilities
  222
- Module Description
  223
  - Timer 1 (T1) Prescaler/Clock Source
    223
  - Timer Block Diagram
    223
  - T1 Prescaler Clock Source
    224
  - T1 Counter
    225
  - Bit Programmable General Purpose T1
    225
  - Watchdog (WD)
    226
  - T1 Interrupts
    226
  - Watchdog Counter
    226
  - Keyboard Scan Using T1IC/CR as an External Interrupt
    227
  - T1 I/O Pins
    228
  - T1 Operational Modes
    229
  - Dual Compare Mode for T1
    229
  - Capture/Compare Mode for T1
    230
  - T2 Interrupts
    231
  - Bit Programmable General Purpose T2
    231
  - T2 I/O Pins
    232
  - T2 Operational Modes
    233
  - Dual Compare Mode for T2
    233
  - Dual Capture Mode for T2
    234
  - Timer Formulas
    235
  - Timer 1: T1 and WD Counter Overflow
    235
  - T1 Module Counter Overflow Rates
    235
  - T1: Compare Register Formula
    236
  - T1 Compare Register Values (SYSCLK = 5 Mhz)
    236
  - Timer 2: T2 Counter Overflow
    237
  - T2 Module Counter Overflow Rates
    237
  - Timer 2: Compare Register Formula
    238
  - T2 Compare Register Values (SYSCLK = 5 Mhz)
    238
- Common Register Equate Table
  239
- Timer Application Software Routine Examples
  239
- Watchdog Operation and Initialization
  259
- Specific Applications
  266
- Conclusion
  302
Appendix A: Timer 1 (T1) Control Registers

303
Appendix B: Timer 2 (T2) Control Registers

306
- Timer 2A Module Register Memory Map
  307
- Timer 2 - Dual Capture Mode
  308
- Timer 2 - Dual Compare Mode
  309
- References
  310
- Glossary
  311
Using Input Capture Pins as External Interrupts

314
- Introduction
  316
- Timer 1
  316
- Timer 2A
  316
- Timer 2B
  317
Watchdog Design Considerations and Mask Options

318
- Hard Watchdog Mask Option
  320
- Introduction
  320
- Standard Watchdog
  320
- Simple Counter
  321
T1PWM Set-Up Routines

324
Analog-To-Digital Module

330
Using the TMS370 ADC1 Module

330
- Introduction
  332
- Module Description
  332
- Design Considerations
  335
  - A/ D Input Pin Model
    335
  - Analog Input Pin Connection
    336
  - A/D Input Pin Model
    336
  - Analog Input Conditioning
    338
  - Operational Amplifier
    338
  - Key Op Amp Parameters
    338
  - Noninverting Buffer for Analog Input Pin
    339
  - Inverting Buffer for Analog Input Pin
    339
  - Range Offsetting and Scaling
    339
  - Bridge Amplifier
    340
  - Resolution
    341
  - Example of Interface Circuit to Increase Resolution to Nine Bits
    341
  - Transfer Characteristics of the Interface Circuit
    342
  - Injecting Noise into the Input Signal
    342
  - Ratiometric Conversion
    343
  - Sampling Frequency
    343
  - Block Diagram of Two Step Subranging Conversion
    343
  - Analog Reference and Layout Considerations
    344
- Aliasing Signal Caused by Inadequate Sampling Rate
  344
- Circuit with Common Impedance Earth Path
  345
- Circuit with no Common Impedance Earth Path
  345
- Reference Voltage Source Impedance
  346
- Software Routines
  347
  - Common Equates
    347
  - Single Channel Continuous Conversion
    347
  - APNTR Pointer
    347
  - Multiple Channel Conversions
    350
  - Analog Input Table
    350
- Application Examples
  353
  - Data Translation
    353
  - Conversion Formula
    353
  - Temperature Sensor Interface
    356
  - Automatic Ranging Interface
    357
  - Autoranging Circuit Diagram
    358
  - Amplifier Gain Factor
    358
  - Interfacing a Serial A/D Converter with TMS370 Family Microcontrollers
    362
  - Using on Chip SPI
    362
  - Interfacing Circuit Using SPI
    363
  - Using Software to Interface with a Serial A/D Converter
    368
  - Interfacing Circuit Using Software Routine
    368
- Conclusions
  374
- A/D Control Register Memory Map
  375
Appendix A: a DC1 Control Registers

375
Appendix D: a / D Testing

381
- Test Conditions
  381
- Block Diagram of Test Set up
  382
- Code Width Measurement
  383
- Codes Having Maximum Differential Linearity Error
  384
- Differential Linearity Error
  384
  - Glossary
    385
  - References
    386
Analog-To-Digital (A/D) Helpful Hints

388
- Power down Operation
  390
  - Example : Typical A/D Input Selection and Conversion Process
    391
PACT Module

398
PACT Command Macros

398
PACT Module Sample Routines

404
PACT Module Sample Routines

406
- Introduction
  406
- Using the Hardware Default Timer
  407
  - Command / Definition (CMD/DEF) Initialization
    408
  - PWM with Period and Duty Cycle Change
    410
  - Example 1 PWM
    413
  - Virtual Timer PWM
    413
  - Timing Diagram
    415
  - PWM Example 2 W Ave
    417
  - Pulse Width Modulation Example 2
    417
  - P ACT Timing Diagram
    420
  - External Event, Event Delay, and Sync Pulses
    422
  - P ACT Timing Diagram
    425
  - External Event and PWM
    427
  - PWM Generation on Selected Event
    427
  - P ACT Timing Diagrams
    430
  - CP1 and CP2 Events
    432
  - Using Dedicated 32 Bit Capture Registers
    432
  - Cp6 Pwm
    436
  - Using the Circular Buffer Registers
    436
  - Step Mode PWM
    441
  - Using PACT Step Mode
    441
  - P ACT Timing Diagram
    443
  - Programming the PACT SCI
    445
  - P ACT Timing Diagram
    448
  - P ACT Dual Port Ram Mapping
    448
Appendix

448
- Circular Buffer in Dual Port RAM
  449
  - PACT Input Capture Structure
    449
  - Command and Definition Area
    450
  - SCI Baud Rate Timer Definition
    451
  - Offset Timer Definition - Time from Last Event
    452
  - Standard Compare Command
    453
  - Conditional Compare Command
    454
  - Double Event Compare Command
    455
  - PACT Control Registers
    456
  - Interrupt Vector Sources
    457
- Proper Termination of Unused I/O Pins
  
  460
Part IV: EEPROM Programming

468
- EEPROM Self Programming
  
  470
  - Programming with the TMS370 Family
    472
    
    PROGRAM Routine
    472
    
    Write Data EEPROM Routine
    472
    
    EEPROG Routine
    473
    
    PROGRAM Routine (Provides Actual Values at each Step)
    473
- Bootstrap Programs
  
  476
Part V: External Memory Expansion Examples

492
- Using Memory Expansion in Microcomputer Mode with Internal Memory Disabled
  494
Using Memory Expansion in Microcomputer Mode with

494
- Read and Write Functions
  496
Internal Memory Disabled

494
- Introduction
  496
- Special Features
  496
- Interfacing and Accessing External Memory
  
  498
  - Microcomputer Interface Example
    500
  - Microcomputer Interface Example
    501
  - Memory Interface Timing
    502
    
    Alid Address to Data Read Time Requirement
    503
    
    Read Cycle Timing
    503
    
    Alid Address to Data Read Timing
    504
    
    Chip Select Low to Data Read Requirements
    504
    
    Chip Select High to Next Data Bus Drive Requirements
    505
    
    Chip Select High to Next Data Bus Drive Timing
    505
    
    Chip Select Low to Data Read Timing
    505
    
    Read Data Hold after Chip Select High Requirements
    506
    
    Read Data Hold after Chip Select High Timing
    506
    
    Data Hold after Chip Select High
    507
    
    Write Cycle Timing
    507
    
    Write Data Set up Time Requirements
    507
    
    Write Data Set up Timing
    507
    
    Design Options
    508
    
    Faster Speed
    508
    
    Lower Cost
    508
    
    Write Data Hold after Chip Select High
    508
    
    Bank Switching Examples
    509
    
    Equates for Examples
    510
    
    Peripheral File Frame 2: Digital Port Control Registers
    510
    
    Coding
    511
    
    Initializing to EPROM/RAM Bank 1
    511
    
    Port Configuration Registers Set up
    511
    
    Changing RAM Banks
    512
    
    Changing to EPROM Bank 2
    512
    
    Changing to EPROM Bank 3 and RAM Bank 2
    512
    
    Read/Write Serial EEPROM Data on the TMS370
    514
  - Wait State Control Bits
    502
Part VI: Specific System Application Design Aids

522
- EMI Reduction
  
  522
Cost Effective Input Protection Circuitry for the Texas Instruments

522
- PCB Design Guidelines for Reduced EMI
  
  524
  - Overview
    526
  - Background and Theory
    526
    
    EMI Sources, Paths, and Receivers
    526
    
    EMI Sources, Paths, and Receivers
    527
    
    Loop Areas
    527
    
    Loops and Antennas
    527
    
    Paths of Least Impedance Vs. Paths of Least Resistance
    528
    
    The Loop: Current Flow Path
    528
    
    Common Mode Noise
    529
    
    Differential Mode and Common Mode Radiation
    529
    
    Differential Mode Noise
    529
    
    Differential Mode Radiation
    529
    
    Common Mode Radiation
    530
    
    Coupling
    530
    
    Oscillator Coupling Onto I/O Signal
    530
    
    Hidden Schematic Effects of Common Passive Circuit Elements
    531
    
    High-Frequency Characteristics of Passive Devices
    531
    
    Reciprocity of Emissions and Susceptibility
    531
    
    Board Zoning
    532
    
    Floor-Plan PCB First
    532
    
    PCB Design Implementation
    532
    
    Grounding
    533
    
    Minimize Routing Distances
    533
    
    PCB Zoning
    533
    
    Short Routes for High Frequency Signals
    533
    
    Space for Ground Structures
    533
    
    Digital: Grid the Ground
    534
    
    Ground Grid
    535
    
    Micro Ground
    536
    
    Analog Ground
    537
    
    Ground Width
    537
    
    Noisy Ground
    537
    
    Series and Parallel Ground Connection Schemes
    537
    
    Connector Grounds
    538
    
    Filter Configuration
    538
    
    Low Impedance Ground Node
    538
    
    Power Routing
    538
    
    Clock Lines
    539
    
    Multi Layer Boards
    539
    
    Bypassing
    540
    
    Slot in a Ground Plane
    540
    
    Connector Bypassing
    541
    
    Power Bypassing: VCC/VSS, VCC3/VSS3
    541
    
    Signal Bypassing
    541
    
    Priority of Guidelines
    542
    
    Summary
    542
    
    References
    543
- Cost Effective Input Protection Circuitry for the Texas Instruments
  
  544
- TMS370 Family of Microcontrollers
  
  546
  - Cost Effective Input Protection Circuitry for the Texas Instruments
    546
Cost Effective Input Protection Circuitry for the Texas Instruments TMS370 Family of Microcontrollers

546

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Part I: Introduction

Introduction

Part II: Software Routines

Arithmetic

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Binary-To-BCD Conversion on the TMS370

BCD String Addition with the TMS370

Memory Operations

RAM Self-Test Routine

ROM Checksum on the TMS370

Table Search with the TMS370

Table Search with the TMS370

Bubble Sort with the TMS370

Specific Functionality

Routine to Read a 16-Key Keyboard 1. Keyboard Scan Connections to Port D

Routine to Read a 16-Key Keyboard

DTMF Generation with the TMS370

System Integrity Check for the TMS370

RESET Operations

Part III: Module Specific Application Design Aids

Reset: Explanation of Operation and Suggested Designs

Using the TMS370 SPI and SCI Modules 1. SPI Block Diagram

SPI and SCI Modules

Using the TMS370 SPI and SCI Modules

Remote Data Acquisition Example

Appendix C

Fast Method to Determine Parity

Automatic Baud Rate Calculation

Timer and Watchdog Modules

Using the TMS370 Timer Modules

Appendix A: Timer 1 (T1) Control Registers

Appendix B: Timer 2 (T2) Control Registers

Using Input Capture Pins as External Interrupts

Watchdog Design Considerations and Mask Options

T1PWM Set-Up Routines

Analog-To-Digital Module

Using the TMS370 ADC1 Module

Appendix A: a DC1 Control Registers

Appendix D: a / D Testing

Analog-To-Digital (A/D) Helpful Hints

PACT Module

PACT Command Macros

PACT Module Sample Routines

PACT Module Sample Routines

Appendix

Proper Termination of Unused I/O Pins

Part IV: EEPROM Programming

EEPROM Self Programming

Bootstrap Programs

Part V: External Memory Expansion Examples

Using Memory Expansion in Microcomputer Mode with

Internal Memory Disabled

Interfacing and Accessing External Memory

Part VI: Specific System Application Design Aids

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