Bootstrap Loader (Bsl); Jtag Operation - Texas Instruments MSP430F663x Manual

Mixed signal microcontroller
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Bootstrap Loader (BSL)

The BSL enables users to program the flash memory or RAM using various serial interfaces. Access to the
device memory via the BSL is protected by an user-defined password. For complete description of the features of
the BSL and its implementation, see MSP430 Programming Via the Bootstrap Loader (BSL) (SLAU319).
USB BSL
All devices come pre-programmed with the USB BSL. Use of the USB BSL requires external access to the six
pins shown in
Table
8. In addition to these pins, the application must support external components necessary for
normal USB operation; for example, the proper crystal on XT2IN and XT2OUT or proper decoupling.
The default USB BSL evaluates the logic level of the PUR pin after a BOR reset. If it is
pulled high externally, then the BSL is invoked. Therefore, unless the application is
invoking the BSL, it is important to keep PUR pulled low after a BOR reset, even if BSL or
USB is never used. Applying a 1-MΩ resistor to ground is recommended.
UART BSL
A UART BSL is also available that can be programmed by the user into the BSL memory by replacing the pre-
programmed, factory supplied, USB BSL. Use of the UART BSL requires external access to the six pins shown
in
Table
9.

JTAG Operation

JTAG Standard Interface
The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving
data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the
JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430
development tools and device programmers. The JTAG pin requirements are shown in
details on interfacing to development tools and device programmers, see the MSP430(tm) Hardware Tools
User's Guide (SLAU278). For a complete description of the features of the JTAG interface and its
implementation, see MSP430 Programming Via the JTAG Interface (SLAU320).
Copyright © 2010–2012, Texas Instruments Incorporated
Table 8. USB BSL Pin Requirements and Functions
DEVICE SIGNAL
RST/NMI/SBWTDIO
PU.0/DP
PU.1/DM
PUR
VBUS
VSSU
Table 9. UART BSL Pin Requirements and Functions
DEVICE SIGNAL
RST/NMI/SBWTDIO
TEST/SBWTCK
P1.1
P1.2
VCC
VSS
SLAS566C – JUNE 2010 – REVISED AUGUST 2012
BSL FUNCTION
Entry sequence signal
USB data terminal DP
USB data terminal DM
USB pullup resistor terminal
USB bus power supply
USB ground supply
NOTE
BSL FUNCTION
Entry sequence signal
Entry sequence signal
Data transmit
Data receive
Power supply
Ground supply
MSP430F663x
Table
10. For further
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