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MSPM0G3107-Q1, MSPM0G3106-Q1, MSPM0G3105-Q1
SLASF86 – OCTOBER 2023
8.28 Serial Wire Debug Interface
A serial wire debug (SWD) two-wire interface is provided via an Arm compatible serial wire debug port (SW-
DP) to enable access to multiple debug functions within the device. For a complete description of the debug
functionality offered on MSPM0 devices, see the debug chapter of the technical reference manual.
Table 8-12. Serial Wire Debug Pin Requirements and Functions
DEVICE SIGNAL
SWCLK
SWDIO
8.29 Bootstrap Loader (BSL)
The bootstrap loader (BSL) enables configuration of the device as well as programming of the device memory
through a UART or I2C serial interface. Access to the device memory and configuration through the BSL is
protected by a 256-bit user-defined password, and it is possible to completely disable the BSL in the device
configuration, if desired. The BSL is enabled by default from TI to support use of the BSL for production
programming.
A minimum of two pins are required to use the BSL: the BSLRX and BSLTX signals (for UART), or the BSLSCL
and BSLSDA signals (for I
controlled invocation of the bootloader by an external host.
If enabled, the BSL may be invoked (started) in the following ways:
•
The BSL is invoked during the boot process if the BSL_invoke pin state matches the defined BSL_invoke
logic level. If the device fast boot mode is enabled, this invocation check is skipped. An external host can
force the device into the BSL by asserting the invoke condition and applying a reset pulse to the NRST pin to
trigger a BOOTRST, after which the device will verify the invoke condition during the reboot process and start
the BSL if the invoke condition matches the expected logic level.
•
The BSL is automatically invoked during the boot process if the reset vector and stack pointer are left
unprogrammed. As a result, a blank device from TI will invoke the BSL during the boot process without any
need to provide a hardware invoke condition on the BSL_invoke pin. This enables production programming
using just the serial interface signals.
•
The BSL may be invoked at runtime from application software by issuing a SYSRST with BSL entry
command.
DEVICE SIGNAL
BSLRX
BSLTX
BSLSCL
BSLSDA
BSL_invoke
NRST
For a complete description of the BSL functionality and command set, see the
8.30 Device Factory Constants
All devices include a memory-mapped FACTORY region which provides read-only data describing the
capabilities of a device as well as any factory-provided trim information for use by application software. Refer to
Factory Constants chapter of the
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DIRECTION
Input
Input/Output
2
C). Additionally, one or two additional pins (BSL_invoke and NRST) may be used for
Table 8-13. BSL Pin Requirements and Functions
CONNECTION
Required for UART
Required for UART
Required for I2C
Required for I2C
Optional
Optional
MSPM0 G-Series 80-MHz Microcontrollers Technical Reference
Product Folder Links:
MSPM0G3107-Q1 MSPM0G3106-Q1 MSPM0G3105-Q1
SWD FUNCTION
Serial wire clock from debug probe
Bi-directional (shared) serial wire data
BSL FUNCTION
UART receive signal (RXD), an input
UART transmit signal (TXD) an output
2
I
C BSL clock signal (SCL)
2
I
C BSL data signal (SDA)
Active-high digital input used to start the BSL
during boot
Active-low reset pin used to trigger a reset
and subsequent check of the invoke signal
(BSL_invoke)
MSPM0 Bootloader User's
Copyright © 2023 Texas Instruments Incorporated
www.ti.com
Guide.
Manual.
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