JVC RX-DV31SL Service Manual page 51

Pin No. Symbol
31 VSSIO
32, 33 MA
34 VDD
35 CS0
36 VDDIO
37 RAS
38 CAS
39 WE
40 VSSIO
41, 42 DQM
43 MD
44 VDDIO
45, 46 MD
47 VSS
48 MD
49 VSSIO
50-52 MD
53 VDDIO
54, 55 MD
56 MD
57 VSSIO
58-61 MD
62 VDDIO
63, 64 MD
65 DQM
66 CS1
67 VSSIO
68 SPDIF
69 VSS
70 AIN
71 AOUT3
72 AOUT2
73 AOUT1
74 AOUT0
75 VDDIO
76 PCMCLK
77 VDD
78 ACLK
79 LRCLK
80 SRST
81 RSTP
82 VSSIO
83 RXD1
84 SSPIN1/BAUD1
85 VSS
86 SSPOUT1/DTR1
87 SSPCLK1/CTS1
88 SSPCLK0/RTS1
89 VDD
90 SSPIN0/BAUD0
91 VDDIO
I/O
I/O pad ground
O SDRAM address bus, reserved for pin compatibility with 64Mb SDRAM
Core power =1.8V
O SDRAM primary bank chip select
I/O pad power =3.3V
O SDRAM command bit
O SDRAM command bit
O SDRAM command bit
I/O pad ground
O SDRAM data byte enables
I/O SDRAM data bus
I/O pad power =3.3V
I/O SDRAM data bus
Core and Ring ground
I/O SDRAM data bus
I/O pad ground
I/O SDRAM data bus
I/O pad power =3.3
I/O VSDRAM data bus
I/O SDRAM data bus
I/O pad ground
I/O SDRAM data bus
I/O pad power =3.3V
I/O SDRAM data bus
O SDRAM data byte enables
O SDRAM extension bank chip select
I/O pad ground
O S/PDIF digital audio output
Core and Ring ground
I Digital audio input for digital micro
O Serial audio output data to audio DAC for Lch and Rch for down-mixed stereo
O Serial audio output data to audio DAC for SLch and SRch
O Serial audio output data to audio DAC for Cch and LFEch
O Serial audio output data to audio DAC for Lch and Rch
I/O pad power =3.3V
O Audio DAC PCM sampling click frequency, common clock for DACs and ADC
Core power =1.8V
O Audio interface serial data clock, common clock for DACs and ADC
O L/R channel clock, common clock for DACs and ADC
O Active low RESET signal for peripheral reset
I RESET input pin form system
I/O pad ground
I UART1 serial data input from external serial devise
I/O SSP1 data in or 16X clock for USART function in UART1
Core and Ring ground
I/O SSP1data out or UART1 data-terminal-ready signal
I/O SSP1clock or UART1 clear-to-send signal
I/O SSP0 clock or request-to-send function in UART1
Core power =1.8V
I/O SSP0 data in or 16X clock for USART function in UART0
I/O pad power =3.3V
Function
(No.22023)1-51