Table of Contents
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12. CIRCUIT DIAGRAMS
12.1. Main PCB (Baseband)
RF I/F
VRF0
VRF1
TP517
VRF2
PALEVEL
I
IX
Q
QX
BAT_ID_TEMP
RF_TEMP
ACC_ID
LIGHT_SENSE
VBAT_PA
LOAD
TXON_PA
VC[1]
VC[2]
VC[3]
PWM1
HS_AMP_UD
TP506
ACC_PWR_EN
TP505
HS_AMP_CLK
TP507
TP508
IRDA_SD
AFC
EN
STEREO_MONO
CLK
DA
BB_SYS_CLK
C550
47p
BB_SYS_CLK
XO_EN
CN504
MM BLOCK I/F
DISP_IRQ
34
37
PWM1
6
FL601
5
1
24
4
2
22
3
FL602
6
1
5
35
2
4
21
3
17
36
16
AP_RST
14
LED_EN
TP613
TP614
5
46
3
RECN
2
RECP
V_SD
VINT
40
2V85
41
VBB2
38
39
44
45
42
43
VBAT
6
7
8
9
10
11
V_SD
U603
12
5
1
VCC
IN_A
13
2
VBB2
>
GND
TP611
4
3
OUT_Y
NC
1
4
18
20
23
25
U602
V_SD
5
1
VBB1
LCD_SCS
VCC
IN_A
15
2
GND
CLK32K
4
3
19
OUT_Y
NC
26
27
28
29
30
31
32
33
47
48
49
50
VINT
51
52
VINT
VSIM VUSB VRTC VBB2
32 kHz CLK from BB_IC
R600
V_SD : 1.8V
26 MHz CLK
VRF3 : 2.65 V
from RF_IC
U1001
BLUE TMOON
VRF3
V_SD
C1000
0p
17
15
BB_SYS_CLK
SYRI
VDDPM
14
7
BT_VCXOEN
SLEEPX
VDD-7
10
32
CLK32
VDD-32
39
45
WAKEUP_HOST
VDD-45
11
19
RTS_1
WAKEUP_BT
VDDRF-19
12
24
R1056 0
AP_RST
RESETQ
VDDRF-24
TP1000TP1001TP1002TP1003
29
VDDRF-29
47
1
I2S1_TX
PCMIN
VDDPCM
48
36
I2S1_RX
PCMOUT
VDDUART
2
I2S1_WA0
PCMFR
3
6
C1007
0p
I2S1_CLK0
PCMCL
VDDC-6
40
VDDC-40
R1055
34
16
C1008
0p
0603
RXD_1
UARTOUT
BREF
R1054
37
25
C1009
0p
TXD_1
UARTIN
VCOCAP
R1053
35
CTS_1
UARTRTS
R1052
38
26
C1004
0p
UARTCTS
DRCAP
27
R1040
ICHP
18
28
C1003
0p
>
RXOUT
VTUNE
30
PAON
31
R1038
C1005
0 dBm Output
PSEL0
33
UART data
PSEL1
0p
9
Bluetooth ANT
with BB_IC
RXON
FL1001
46
GPIO0
VRF3
>
44
TDO
43
20
4
1
TDI
RFIOX
BALANCE-4
UNBALANCE
42
21
3
2
TMS
RFIO
BALANCE-3
DC
C1019
41
22
TCK
TXA
GND
3p
13
23
TRST
TXAX
6
5
4
49
I2DAT/GPIO1
GND
5
C1010
I2CLK/GPIO2
8
SUPEEP
0p
BAND PASS FILTER
VBAT
U500
S-GOLD LITE (BASEBAND PROCESSOR)
H19 PAD_PAOUT1:O
G21 PAD_BB_I:B
H20 PAD_BB_IX:B
TP512
TP513
TP514
TP515
H21 PAD_BB_Q:B
J20 PAD_BB_QX:B
L21 PAD_M0:B
N3
EBU_CS1_N
K21 PAD_M1:B
P1
EBU_CS2_N
B10
K19 PAD_M2:B
T_OUT12
TP511
M3
L20 PAD_M7:B
EBU_BC1_N
L1
J21 PAD_M8:B
EBU_BC0_N
P2
J19 PAD_M9:B
EBU_CS0_N
PCB_ID
L3
K20 PAD_M10:B
EBU_RAS_N
V3
DATA[0]
C14 T_OUT0
EBU_AD[0]
DATA[1]
V1
EBU_AD[1]
A12 T_OUT2
W1
DATA[2]
EBU_AD[2]
A11 T_OUT3
Y1
DATA[3]
EBU_AD[3]
C11 T_OUT4
W3
DATA[4]
EBU_AD[4]
C10 T_OUT5
Y2
DATA[5]
EBU_AD[5]
B9 T_OUT6
W4
DATA[6]
EBU_AD[6]
B8 T_OUT7
AA2
DATA[7]
EBU_AD[7]
W2
DATA[8]
EBU_AD[8]
B13 T_OUT9
W5
DATA[9]
EBU_AD[9]
GPS_IRQ
B12 T_OUT10
AA3
DATA[10]
EBU_AD[10]
AA4
DATA[11]
B11 T_OUT11
EBU_AD[11]
W6
DATA[12]
EBU_AD[12]
Y3
DATA[13]
B7 AFC
EBU_AD[13]
AA5
DATA[14]
A9 RF_STR0
EBU_AD[14]
W7
DATA[15]
A13 RF_STR1
EBU_AD[15]
C1
ADD[0]
A8 RF_CLK
EBU_A[0]
ADD[0]
C9 RF_DATA
C2
ADD[1]
EBU_A[1]
Y11 F26M
F3
ADD[2]
EBU_A[2]
E21 VCXO_EN
D1
ADD[3]
EBU_A[3]
D2
ADD[4]
EBU_A[4]
G3
ADD[5]
EBU_A[5]
E1
ADD[6]
EBU_A[6]
C15 T_OUT1
H3
ADD[7]
EBU_A[7]
E2
ADD[8]
EBU_A[8]
F1
ADD[9]
EBU_A[9]
J3
ADD[10]
EBU_A[10]
F2
ADD[11]
EBU_A[11]
DIF_CLK
G1
ADD[12]
A4 DIF_CLK
EBU_A[12]
K3
ADD[13]
EBU_A[13]
DIF_MTSR
G2
ADD[14]
C6 DIF_MTSR
EBU_A[14]
H1
ADD[15]
EBU_A[15]
J1
ADD[16]
EBU_A[16]
J2
ADD[17]
EBU_A[17]
K1
ADD[18]
EBU_A[18]
K2
ADD[19]
EBU_A[19]
DIF_RS
C5 DIF_RS
L2
ADD[20]
EBU_A[20]
M2
ADD[21]
EBU_A[21]
DIF_MRST
A2 DSPIN1
M1
ADD[22]
EBU_A[22]
P3
ADD[23]
EBU_A[23]
R1
A[24]
EBU_A[24]
TP509
N2
EBU_RD_N
DIF_RESET
Y16 RSTOUT_N
DIF_CS
N1
B4 DIF_CS
EBU_WR_N
AP_RST
T2
C4 DIF_RESET
EBU_BFCLKO
V2
A1 RESERVED-A1
EBU_WAIT_N
R3
A21 RESERVED-A21
EBU_ADV_N
T3
BFCLKI
G7 RESERVED-G7
EBU_BFCLKI
T1
G15 RESERVED-G15
EBU_SDCLKO
R7 RESERVED-R7
U1
SDCLKI
EBU_SDCLKI
R15 RESERVED-R15
U2
EBU_CKE
V19 RESERVED-V19
H2
EBU_CAS_N
W19 RESERVED-W19
R2
EBU_CS3_N
CS_MA3
Y20 RESERVED-Y20
AA11
RTC_OUT
AA1 RESERVED-AA1
W13
F32K
AA20 RESERVED-AA20
AA12
OSC32K
AA21 RESERVED-AA21
AA13
R606
0
RESET_N
RESETN
Y4 TRACECLK
AA6 TRACESYNC
Y9 PIPESTAT[0]
AA10 PIPESTAT[1]
AA17
Y10 PIPESTAT[2]
DSPIN0
AP_CLK
AA15
SIGN1509
Y5 TRACEPKT[0]
DSPOUT0
ACC_DET
B2
Y6 TRACEPKT[1]
DSPOUT1
MA3_IRQ
T21
AA7 TRACEPKT[2]
PAD_EPN1:O
RECN
Y7 TRACEPKT[3]
AA8 TRACEPKT[4]
Y8 TRACEPKT[5]
R21
AA9 TRACEPKT[6]
PAD_EPP1:O
RECP
U21
EPPA1
W10 TRACEPKT[7]
PAD_EPPA1:O
W21
EPPA2
CLK32K_V27
B19 SSC2_MTSR
PAD_EPPA2:O
LCD_SCS_V27
A7 T_OUT8
DISP_CLK
B3 CLKOUT0
H14 VDD_MAIN_1
V21
N7 VDD_MAIN_3
PAD_EPREF:O
U19
PAD_MICN1:I
MICN1
W9 VDD_MAIN_5
T20
PAD_MICP1:I
R14 VDD_MAIN_6
MICP1
P21
PAD_MICN2:I
C16 VSS_MAIN_1
MICN2
P19
PAD_MICP2:I
M8 VSS_MAIN_3
MICP2
R20
PAD_VMICP:O
R8 VSS_MAIN_5
VMICP
W14 VSS_MAIN_6
H13 VDD_DSP_1
N21
PAD_VMICN:O
GND
(VMICN)
G9 VDD_DSP_2
G20
KP_IN0
G13 VSS_DSP_1
E19
KP_IN1
V_SD
C7 VSS_DSP_2
F21
KP_IN2
J7 VDDP_EBU_RING_2_3_1
D19
KP_IN3
J8 VDDP_EBU_RING_2_3_2
C18
SSC2_SCLK
M7 VDDP_EBU_RING_2_3_3
F20
KP_IN4
N8 VDDP_EBU_RING_2_3_4
E20
KP_IN5
D21
P7 VDDP_EBU_RING_2_3_5
KP_IN6
C21
K7 VSSP_EBU_RING_2_3_1
KP_OUT0
B20
H7 VSSP_EBU_RING_2_3_2
KP_OUT1
A20
L7 VSSP_EBU_RING_2_3_3
KP_OUT2
C19
U3 VSSP_EBU_RING_2_3_4
KP_OUT3
C17
P9 VSSP_EBU_RING_2_3_5
SSC2_MRST
P10 VSSP_EBU_RING_2_3_6
D20
I2S2_CLK0
DAI_CLK
W8 VDDP_ETM_1
1
2
1
2
P8 VDDP_ETM_2
R9 VSSP_ETM_1_DBF
VINT
R10 VSSP_ETM_2
J15 VDDP_DIG_A1
3
3
D612
D613
H15 VDDP_DIG_A2
V_SD
K14 VSSP_DIG_A1
G14 VDDP_DIG_B
B21
I2C_SCL
H12 VSSP_DIG_B
I2C_SCL
C20
I2C_SDA
I2C_SDA
Y12
PMINT
PM_INT
B18
R550
G11 VDDP_DIG_C1
I2S2_RX
A18
G10 VDDP_DIG_C2
I2S2_TX
DAI_TX
V_SD
G12 VSSP_DIG_C1
B15
A3 VDDP_DIG_D1
I2S1_CLK0
I2S1_CLK0
A17
VINT
H8 VSSP_DIG_D1
I2S1_RX
I2S1_RX
B17
W15 VDDP_DIG_E1
I2S1_TX
I2S1_TX
B16
I2S1_WA0
I2S1_WA0
P14 VDDP_DIG_E2
C13
I2S3_CLK
HS_DET
R12 VSSP_DIG_E1
C12
I2S3_TX
TP612
A10
HS_AMP_SD
I2S3_WA
Y13
USART0_RXD
RXD_0
Y14
C8 VDDP_SIM
USART0_TXD
TXD_0
AA14
E3 VDD_USB
USART0_RTS_N
RTS_0
Y15
C3 VSS_USB_DBF
USART0_CTS_N
CTS_0
A16
W12 VDD_RTC
USART1_RXD
RXD_1
A15
4.7
W11 VDD_PLL
USART1_TXD
TXD_1
A14
R11 VSS_RTC_PLL_DBF
USART1_RTS_N
RTS_1
B14
USART1_CTS_N
CTS_1
D3
USB_DPLUS
USB_DP
B1
G8 VSSP_DIG_CENTRE-G8
USB_DMINUS
USB_DN
H9 VSSP_DIG_CENTRE-H9
A6
SIM_IO
CC_IO
H10 VSSP_DIG_CENTRE-H10
B5
CC_VZ
CC_VZ_N
H11 VSSP_DIG_CENTRE-H11
A5
SIM_CLK
CC_CLK
J9 VSSP_DIG_CENTRE-J9
B6
SIM_RST
CC_RST
J10 VSSP_DIG_CENTRE-J10
Y18
TDO
TDO
J11 VSSP_DIG_CENTRE-J11
AA18
TDI
TDI
J12 VSSP_DIG_CENTRE-J12
W18
R608
TMS
TMS
J13 VSSP_DIG_CENTRE-J13
Y19
TCK
TCK
J14 VSSP_DIG_CENTRE-J14
AA19
TRST_N
TRST_N
W17
RTCK
K8 VSSP_DIG_CENTRE-K8
RTCK
Y17
TRIG_IN
K9 VSSP_DIG_CENTRE-K9
TRIG_IN
W16
MON1
K10 VSSP_DIG_CENTRE-K10
MON1
AA16
MON2
K11 VSSP_DIG_CENTRE-K11
MON2
N20
K12 VSSP_DIG_CENTRE-K12
PAD_VREF:O
P20
R604
30k
(1%)
5
K13 VSSP_DIG_CENTRE-K13
PAD_IREF:O
L8 VSSP_DIG_CENTRE-L8
VANA
W20
R659 0
L9 VSSP_DIG_CENTRE-L9
VDDVBR:P_1
L10 VSSP_DIG_CENTRE-L10
U20
VDDVBR:P_2
L11 VSSP_DIG_CENTRE-L11
P15
1
VDDVBT:P
L12 VSSP_DIG_CENTRE-L12
K15
VSSBB:G
L13 VSSP_DIG_CENTRE-L13
V20
VSSVBR:G_1
L14 VSSP_DIG_CENTRE-L14
T19
VSSVBR:G_2
R660
VANA
M9 VSSP_DIG_CENTRE-M9
M15
VDDD:P
M10 VSSP_DIG_CENTRE-M10
L15
0
VDDM:P
M11 VSSP_DIG_CENTRE-M11
M14
VSSD:G
E1001
M12 VSSP_DIG_CENTRE-M12
L19
M13 VSSP_DIG_CENTRE-M13
VSSM:G
R661
VANA
G19
N9 VSSP_DIG_CENTRE-N9
VDDBB:P
M19
N10 VSSP_DIG_CENTRE-N10
VDDBG:P
0
N19
N11 VSSP_DIG_CENTRE-N11
VSSBG:G
M21
N12 VSSP_DIG_CENTRE-N12
PAD_AGND_FORCE:I
N13 VSSP_DIG_CENTRE-N13
M20
PAD_AGND_SENSE:O
Y21
N14 VSSP_DIG_CENTRE-N14
PAD_GUARDD:I1
E1002
N15 VSSP_DIG_CENTRE-N15
F19
PAD_GUARDD:I2
P11 VSSP_DIG_CENTRE-P11
P12 VSSP_DIG_CENTRE-P12
E1004
P13 VSSP_DIG_CENTRE-P13
A19
FLIP_SENSE
3
VDD 1
I2S2_WA0
OUT
R13 VSSP_DIG_CENTRE-R13
R553
GND
DAI_RESET
R19 VSSVBT:G
2
U504
FLASH MEMORY
E3
R2-CS#
CS_SDRAMN
F2
R1-CS#
CS_FLASH2N
G2
F2-CE#
BC1N
H8
D-DM1/R-UB#
BC0N
H9
D-DM0/R-LB#
CS_FLASH1N
G3
F1-CE#
RASN
F4
D-RAS#
DATA[0]
M2
D0
DATA[1]
L1
D01
DATA[2]
K1
D02
DATA[3]
L2
D03
DATA[4]
M4
D04
DATA[5]
L3
D05
DATA[6]
L4
D06
DATA[7]
L5
D07
DATA[8]
M5
D08
DATA[9]
L6
D09
DATA[10]
M6
D10
DATA[11]
L7
D11
DATA[12]
L8
D12
DATA[13]
K9
D13
DATA[14]
L9
D14
DATA[15]
M8
D15
ADD[0]
D1
A01
ADD[1]
C1
A02
ADD[2]
B1
A03
ADD[3]
B2
A04
ADD[4]
A2
A05
ADD[5]
B3
A06
ADD[6]
A3
A07
ADD[7]
A4
A08
ADD[8]
G8
A09
ADD[9]
F8
A10
ADD[10]
E8
A11
ADD[11]
G9
A12
ADD[12]
F9
A13
ADD[13]
E9
A14
ADD[14]
D9
A15
ADD[15]
C9
A16
ADD[16]
B9
A17
ADD[17]
B4
A18
ADD[18]
B5
A19
ADD[19]
A5
A20
ADD[20]
F7
A21
ADD[21]
E7
A22
TP516
ADD[22]
B7
A23
V_SD
ADD[23]
A6
A24
R601
3.3k
A7
A25
A8
A26
RDN
B8
A27
G4
D-BA0
WRN
H4
D-BA1
R602
22
BFCLKO
H7
OE#
WAITN
E2
WE#
ADVN
K5
F-CLK
R605
22
J9
WAIT
R609
22
SDCLKO
D5
ADV#
R610
22
G7
F-RST#
CKE
J5
R-CLK
CASN
G6
D-CKE
F3
D-CAS#
RTC_OUT
R607
0 0603
RESETN
Y600
4
1
3
2
C596 0.001u
C556
0.1u
R580 10K
R576
10k
C555
0.1u
U502
AUDIO AMP
R577
10k
1
VOUT1
2
VIN1
3
BYPASS
4
GND-4
#SHUTDOWN
KEYIN[0-4]
KEYIN[0]
KEYOUT[0-3,5-7]
KEYIN[1]
KEYIN[2]
KEYIN[3]
KEYIN[4]
KEYOUT[7]
KEYOUT[6]
KEYOUT[5]
KEYOUT[0]
KEYOUT[1]
KEYOUT[2]
KEYOUT[3]
1
2
1
2
1
2
1
2
3
3
3
3
D614
D615
D616
D617
R590
DAI_RX
VSIM
Q500
R539
3
2
TP616
TP615
1
V_SIM
MELODY
TP617 TP618 TP619
WRN
28
/WR
RDN
31
SIM_IO
/RD
30
ADD[0]
A0
SIM_RST
29
CS_MA3
/CS
SIM_CLK
1
AP_CLK
CLKI
R536 0
4
AP_RST
/RST
3
MA3_IRQ
/IRQ
POLY_L
10
JTAG I/F
HPOUT-L/MONO
11
POLY_R
HPOUT-R
17
TP601
SPOUT1
SPOUT1
18
TP602
SPOUT2
2
TP603
LED_EN
LED
TP604
C524
R532 27K
0.033U
TP605
12
EQ1
TP606
SPOUT2
TP607
13
EQ2
TP608
R533 27K
R534 150K
TP609
14
EQ3
4
C523
C559 0.0068u
330p
R559
56K
2 3
VBAT
D501
KEY LED
VINT
DS1015
IrDA
VBAT
1
LEDA
2
NC
3
TXD_0
TXD
4
RXD_0
RXD
5
IRDA_SD
SD
6
VCC
7
GND
8
DAI I/F
SHILED_GND
DAI_TX
TP501
1
2
VINT
DAI_RX
TP502
DAI_CLK
TP503
DAI_RESET
TP504
4
3
– 12-1 –
S1001
3
4
KEYIN[0]
21
S1002
3
4
21
S1003
3
4
KEYIN[2]
21
V_SD
J1
F-VPP
D4
F-VCC-D4
R582
D6
F-VCC-D6
J4
1.2k
F-VCC-J4
J6
F-VCC-J6
VANA
R568
E1
F-WP1#
F1
1k
F-WP2#
R587
C586
MICP2
J2
0.1u
0
VCCQ-J2
J3
VCCQ-J3
C587
J7
VCCQ-J7
MICN2
J8
VANA
VCCQ-J8
0.1u
U503
ANALOGUE SWITCH
C5
R-VCC-C5
D3
4
3
R-VCC-D3
A
B0
D7
5
2
>
R-VCC-D7
VCC
GND
HS_AMP_SD
6
1
S
B1
C506
R560 33
FL501
1
4
22u
2
3
C2
VSS-C2
C3
VSS-C3
C4
VSS-C4
C505
R561 33
C6
VSS-C6
C7
22u
VSS-C7
C8
VSS-C8
K2
VSS-K2
K3
VSS-K3
K4
VSS-K4
K6
VSS-K6
VINT
K7
VSS-K7
K8
VSS-K8
R544
560
D507
RXD_0
R545
560
TXD_0
ACC_DET
R547
CTS_0
H3
F3-CE#
TP542
E6
F4-CE#/A28
A1
R548
DU-A1
RTS_0
A9
DU-A9
D2
5
4
S-VCC
F6
S-CS1#
D908
H2
S-CS2
M1
Q502
DU-M1
VINT
M9
1
2 3
3
DU-M9
4
B6
RFU-B6
D8
RFU-D8
G1
2
5
RFU-G1
H1
RFU-H1
H6
RFU-H6
1
6
M3
KEYOUT[7]
KEYIN[2]
RFU-M3
M7
RFU-M7
1
2
STEREO_MONO
VANA
D506
3
ACC_ID
R509
22 1608
USB_DN
R510
22 1608
USB_DP
1
2
5
4
3
2
1
D907
3
1
2 3
9
VANA
GND-9
8
4
5
6
VDD
7
Q501
VOUT2
6
VIN2
5
HS_AMP_SD
VUSB
R508
100
USB_VBUS
VINT
U900
SM POWER
(POWER MANAGEMENT)
I2C_SDA
24
SDA
VDDCH
I2C_SCL
23
SCL
RTC_OUT
R913
220k
4
ON
36
VCXOEN
XO_EN
ON
PMINT
41
INTOUT
48
RESETN
RESETQ
22
BT_VCXOEN
LRF3EN
R919
1.5k
10
USB_DP
VUPU
VUSB
VDDPW
11
VUSB
12
USB_VBUS
VBUS
U501
VSSPW
V_SD
27
DATA[0]
D0
26
DATA[1]
D1
VBAT
25
DATA[2]
D2
C914
0.1u
26
24
DATA[3]
AUIP
D3
C915
0.1u
25
23
DATA[4]
VBAT
AUIN
D4
22
DATA[5]
D5
VDDAU
21
DATA[6]
D6
U903
20
DATA[7]
LED
16
D7
1
6
LED
32
15
2V85
VDD
CE
IOVDD
2
5
SLED1
7
14
GND-2
GND-5
VDD
SLED2
9
C526
0.1u
3
4
VOUT
VREF
8
VSS
6
R535
3.3k
PLLC
13
5
VIB
N.C
TP536
32
IREF
31
VBAT
BYP
E17
15
M
SPVDD
F501
E16
33
TP535
VSSR
27
16
VSSAU
SPVSS
R573 1K
8
19
MOTOR
VSSFB
MTR
VDDRF
1
2
1
2
1
2
4
3
4
3
4
3
KEYOUT[5]
KEYOUT[0-3,5-7]
1
2
3
D1002
KEYOUT[6]
KEYIN[0-4]
KEYOUT[3]
KEYIN[4]
KEYIN[4]
S101
S105
S109
S115
S125
S121
KEYIN[3]
LSK
1
2
3
2
S102
S106
S110
S118
S127
KEYIN[2]
RSK
4
5
6
3
S103
S107
S111
S113
S123
KEYIN[1]
Q1001
SEND
7
8
9
S104
S108
S112
S128
S120
KEYIN[0]
*0#
CENT
TP540
TP541
CN502
ON
I/O Connector
FL301
1
2
16
HSMIC
OUT_L
19
HSSPKL
OUT_R
18
HSSPKR
HS_DET
17
HSDET
15
GND
7
RXD
9
TXD
8
ACC-DET
6
NC
27
28
29
VBAT
D901
24
VBAT
20
STEREO_MONO
21
HSSW
23
ACC_ID
3
USB_DN
2
USB_DP
10
GND
D909
11
NC
12
NC
13
NC
14
NC
TP538
R565 270
R564 220
22
EXT_PWR_GSM
4
USB_VBUS
TP539
VCHARGE
5
4
5
EXT_PER
1
GND
C576
MK501
1
25
GND
0.1u
26
GND
2
3
C577
0.1u
4
LOAD
3
Q902
6 5 2 1
U901
VBAT_PA
IOUT
VIN
3
4
GND
2
NC
LOAD
1
5
TP909
43
TP904
TP901
CN505
44
VBAT
Battery Connector
VCHC
R925
1
VCHS
1
2
47M
VBATS
VINT
R921
TP905
TP902
22k
R922
BAT_ID_TEMP
2
1k
5
TP903
TP906
TP907
TP908
3
4
7
5
V_SD
6
L901
10uH
SW
9
FB
VBAT
30
35
VDDA
17
VDDB
46
VDDC
VINT
SIM PCB
21
VBB1
VINT
45
VBB2
VLBB1
47
VANA
VLBB2
34
VSIM
VANA
18
2V85
CN503
VSIM1
19
V_SIM
VSIM2
V_SIM
7
SIM_IO
SIM_IO
10
SIM_RST
SIM_RST
9
SIM_CLK
SIM_CLK
5
VRTC
VBAT
R929
42
VRTC
39
4.7k
TP519 TP520
E10
FL3001
BT900
SPOUT1
3
SPOUT2
2
6
VRF0
E11
8
3
VRF1
VRFC
40
VRF2
VRF1
38
VRF3
11
VRF2
37
VMMC
VRF3
14
20
VMMC
1
13
12
4
29
AUOP
28
15
AUON
49
16
GND
KEYOUT[6]
VBAT
ON
GND
(VMICN)
VMICP
MICP1
MICN1
CN501
1
5
6
2
3
4
Speaker
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