National Instruments PC-DIO-24/PnP User Manual page 83

Appendix C Register-Level Programming
port B is in mode 0, use PC0 to generate an interrupt. Once you have
configured the 82C55A, set the corresponding interrupt enable bit in
Interrupt Control Register 1. If you are using PC3, set IRQ0; if you are
using PC0, set IRQ1. When the external signal becomes logic high, an
interrupt request occurs. Although the host computer's interrupt-
monitoring circuitry is triggered by the positive-going edge of the
interrupt signal, the signal must remain high until the interrupt routine
has been entered and interrupts have been masked out. Make sure your
external interrupt signal meets these qualifications. To disable the
external interrupt, clear the appropriate IRQ bit or clear the INTEN bit.
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