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Appendix C
Register-Level Programming
D7
D6
I/O
I/O
Bit
7–6
5
4
3
2
1
PC-DIO-24/PnP User Manual
The control word written to the CNFG Register to configure port B for
input in mode 1 is shown as follows. Notice that port B does not have
extra input or output lines left from port C when ports A and B are both
enabled for handshaking.
D7
1
During a mode 1 data read transfer, the status of the handshaking lines
and interrupt signals can be obtained by reading port C. The port C
status-word bit definitions for an input transfer are shown as follows.
Port C status-word bit definitions for input (port A and port B):
D5
D4
IBFA
INTEA
Name
Description
I/O
Input/Output—These bits can be used for general-
purpose I/O when port A is in mode 1 input. If these
bits are configured for output, the port C bit set/reset
function must be used to manipulate them.
IBFA
Input Buffer for Port A—A high setting indicates that
data has been loaded into the input latch for port A.
INTEA
Interrupt Enable Bit for Port A—Setting this bit
enables interrupts from port A of the 82C55A. This bit
is controlled by setting/resetting PC4.
INTRA
Interrupt Request Status for Port A—When INTEA
and IBFA are high, this bit is high, indicating that an
interrupt request is pending for port A.
INTEB
Interrupt Enable Bit for Port B—Setting this bit
enables interrupts from port B of the 82C55A. This bit
is controlled by setting/resetting PC2.
IBFB
Input Buffer for Port B—A high setting indicates that
data has been loaded into the input latch for port B.
D6
D5
D3
D4
X
X
X
X
D3
INTRA
INTEB
C-12
D2
D1
D0
1
1
X
D2
D1
IBFB
© National Instruments Corporation
D0
INTRB
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