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Appendix A
Device-Specific Information
Voltage
REF
8
Analog
Mux Mode
Muxes
8
Calibration
Mux
2
Trigger Level
DACs
Trigger
PFI / Trigger
Timing
Digital I/O (8)
DAC0
DAC1
Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If
Note
you are using an E Series device in Traditional NI-DAQ (Legacy), refer to Table 1-5 in
Chapter 1 for the Traditional NI-DAQ (Legacy) signal names.
E Series User Manual
•
Two 24-bit counter/timers for TIO
•
A 68-pin I/O connector
Because the NI 6052E devices have no DIP switches, jumpers, or
potentiometers, you can easily configure and calibrate them through
software.
NI PCI/PXI-6052E Block Diagram
Figure A-69 shows a block diagram of the NI PCI/PXI-6052E.
Calibration
DACs
6
+
Programmable
Selection
Gain
Switches
Amplifier
–
Configuration
Memory
Analog
Trigger
Circuitry
Trigger
Counter/
Timing I/O
Digital I/O
DAC
FIFO
Calibration
8
DACs
NI PCI/PXI-6052E Pinout
Figure A-70 shows the NI PCI/PXI-6052E device pinout.
REF
Buffer
2
16-Bit
Sampling
ADC
A/D
FIFO
Converter
AI Control
DMA/
Analog Input
Interrupt
Timing/Control
Request
Bus
DAQ - STC
Interface
Analog Output
RTSI Bus
Timing/Control
Interface
AO Control
Data (16)
RTSI Bus
Figure A-69. NI PCI/PXI-6052E Block Diagram
A-80
Control
PCI
Generic
Bus
MITE
Bus
Interface
Interface
Address/Data
EEPROM
IRQ
DMA
Analog
EEPROM
DMA
Input
Control
Interface
Control
DAQ-STC
MIO
Bus
Interface
Interface
I/O
Analog
Bus
Output
Control
Interface
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