Casio EX-830 Service Manual page 94

9-4. CPU Exceptional Error
The functions of the CPU (SH series) include exception handling. If an exception other than reset and
general interrupt (hereafter called "general exception") occurs, the OS displays a message as shown
below and stops the operation of ECR, because the operation after that cannot be guaranteed.
The example shown below indicates the screen displayed when "reservation instruction code
exception" occurs.
The values of error no., error point and access adrs vary according to errors.
CPU Exceptional Error !!
error no.
error point
access adrs
error no.:

Indicates the exception code of the general exception.
From this code, the operation that causes the general exception is known.
error point:

Indicates the point on the memory where the operation instruction that causes the above general
exception is located (program counter).
However, an illegal address may be displayed depending on the exception code.
access adrs:

Indicates the address that is accessed according to the operation instruction that causes the above
general exception.
However, the address is 0 (zero) and has no meaning if the access is not the cause.
Error Code Correspondence Table

error no. error point
40 Location where error occurs
60 Location where error occurs
80 Location where error occurs
A0 Location where error occurs
C0 Location where error occurs
E0 Location where error occurs
100 Location where error occurs
180 Location where error occurs
1A0 Location where error occurs
180
ffffd47e
0
access adrs
Logical address of comparison source TLB address comparison
Logical address of error source
Logical address of error source
Logical address of error source
Logical address of error source
Address of read destination
Address of write destination
0
0
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Description of error
results in address mismatch
TLB entry is invalid
Initial page write exception
TLB protection exception
(read)
TLB protection exception
(write)
CPU address error (read)
CPU address error (write)
Reservation instruction code
exception
Slot illegal instruction
exception