Ic 7302 (Cxa3268Ar) - JVC GC-QX3U Service Manual

1.4.3 IC 7302 (CXA3268AR)

Pin Descriptions
Pin No. Pin Name I/O
1 Vss - GND terminal for digital 3.0V system
2 FIL OUT O H filter output terminal (for internal sync separator use)
3 SYNC IN I Sync input terminal for sync separator circuit
(for internal sync separator use)
4 SYNC OUT O Sync output terminal for sync separator circuit
(for internal sync separator use)
5 CSYNC/HD I CSYNC/horizontal sync signal input terminal
6 DA OUT O DAC output terminal
7 REF O Level shifter circuit reference voltage output terminal for
LCD panel
8 F ADJ O f0 adjust resistor connecting terminal for TRAP
9 GND1 - GND terminal for analog 3.0V system
10 VD I Vertical sync signal input terminal
11 DWN O Up/Down switching signal output terminal
12 WIDE O 16:9 wide display switching pulse output terminal
13 TST1 - Test terminal (Should be opened.)
14 SCK I Serial clock input terminal
15 SEN I Serial load input terminal
16 SDAT I Serial data input terminal
17 R INJECT O Resistor connecting terminal for serial block current control
18 V - GND terminal for digital 3.0V system
SS
19 V - Power for digital 3.0V system
DD
20 V - Power for digital 3.0V system
DD
21 CKO O Oscillation cell output terminal
22 CKI I Oscillation cell input terminal
23 Vss - GND terminal for digital 3.0V system
24 RPD O Phase comparison output terminal
25 XCLR I Capacitor connecting terminal for power-on reset (for
timing generating system)
26 VDO O VDO pulse output terminal
27 HDO O HDO pulse output terminal
28 TST2 - Test terminal (Should be connected to GND.)
29 GND2 - GND terminal for analog 12.0V system
30 SIG.C I DC voltage adjust terminal for R, G, B and PSIG outputs
31 B DC DET O Capacitor connecting terminal for B signal's DC voltage
feedback circuit
32 B OUT O B signal output terminal
33 R DC DET O Capacitor connecting terminal for R signal's DC voltage
feedback circuit
34 R OUT O R signal output terminal
35 G DC DET O Capacitor connecting terminal for G signal's DC voltage
feedback circuit
1-10
54 53 52 51 50 49 48 47 46
V V
SS SS
+3.0V
V 55
DD
OSD RGB S/H
56 LPF
TST11
FILTER
CONTRAST USER-BRIGHT
S/H
CONT
GEN
57
OSD B
FILTER GAMMAM
TRAP
BIAS
OSD R 58
LPF CLAMP
59
OSD G
G R
B
BLK-LIM
60
NC
MODE
SUB-BRIGHT
HCK1 61
HCK
CLAMP
GEN
G R B
62
HCK2
POL SW
MATRIX
PIC-G
63 +3.0V
VCC1
HST 64
HCOUNTER
PICTURE DL1 DL1
65 HPULSE
EN
GEN
PULSE
HUE
66
VCK PIC-F ELM
HUE
COLOR
VST 67
CLAM[P
CLP
67
RGT
69
FIL IN
MODE
B/B-Y 70
71
G/Y
DA REF
72
R/R-Y
H.FILTER SYNC SEP
Buf Buf
GND1
V
SS
1 2 3 4 5 6 7 8 9
Input
Description
Res.
L
H
45 44 43 42 41 40 39 38 37
GND3 +12.0V +12.0V
PSIG-
Buf
BRT
36 G OUT
PSIG-
Buf
BRIGHT
35
G DC OUT
POL SW
U-GRT
34
R OUT
Buf
γ1γ2
33 R DC DET
WHITLIM
SUB-CONT R
Buf
32
B OUT
SUB-CONT B
31
B DC DET
BLKLIM
Buf
30 SIG. C
SUB-BRT R
SUB-BRT B
29
GND2
SIG.C
GND2
28
TST2
COM-DC
HDO GEN 27 HDO
PLL
COUNTER
VDO GEN 26
VFO
25
XCLR
V CONTROL
V POSITION
PHASE
24 RPD
COMPARATOR
23
V SS V SS
HSYNC DET
H SKEW DET
V COUNTER
22
CKI
V SEP
CK
21 CKO
CONTROL
MCK
CLK
20
+3.0V V
DD
19
+3.0V V
DD
S/P CONV
REGISTER DAC
V SS
10 11 12 13 14 15 16 17 18
36 G OUT O G signal output terminal
37 V 2 - Power for analog 12.0V system
CC
38 PSIG DC O Capacitor connecting terminal for G signal's DC voltage
DET feedback circuit
39 PSIG OUT O PSIG output terminal
40 TST3 - Test terminal (Should be opened.)
41 V 3 - Power for analog 12.0V system COM (CS)
CC
42 COM O Common electrode voltage output terminal (CS) for LCD panel
43 GND3 - GND terminal for analog 12.0V system COM (CS)
44 TST4 - Test terminal (Should be opened.)
45 POF O LCD panel power ON/OFF terminal
(Open, if this function is not used.)
46 NC - No internal connection
47 TST5 - Test terminal (Should be connected to GND.)
48 TST6 - Test terminal (Should be connected to GND.)
49 TST7 - Test terminal (Should be opened.)
50 TST8 - Test terminal (Should be opened.)
51 TST9 - Test terminal (Should be opened.)
52 TST10 - Test terminal (Should be opened.)
53 V - GND terminal for digital 3.0V system
SS
54 V - GND terminal for digital 3.0V system
SS
55 V - Power for digital 3.0V system
DD
56 TST11 - Test terminal (Should be connected to GND.)
57 OSD B I OSD B input terminal
58 OSD R I OSD R input terminal
59 OSD G I OSD G input terminal
60 NC - No internal connection
61 HCK1 O H clock pulse 1 output terminal
62 HCK2 O H clock pulse 2 output terminal
63 V 1 - Power for analog 3.0V system
CC
64 HST O H start pulse output terminal
65 EN O EN pulse output terminal
66 VCK O V clock pulse output terminal
67 VST O V start pulse output terminal
68 RGT O Right/Left switching signal output terminal
69 FIL IN I H FILTER input terminal (for internal sync separator use)
70 B/B-Y I B/B-Y signal input terminal
71 G/Y I G/Y signal input terminal
72 R/R-Y I R/R-Y signal input terminal
* DWN: DOWN SCAN and UP SCAN
H: Pull-up resistor incorporated
RGT: RIGHT SCAN and LEFT SCAN
L: Pull-down resistor incorporated